Method for fabricating a body region for a vertical MOS transistor arrangement having a reduced on resistivity

A method for fabricating a body region of a first conduction type for a vertical MOS transistor configuration in a semiconductor body, the method which comprises:

• providing a body region having at least one channel region configured between a source region of a second conduction type and a drain region of the second conduction type and configuring the channel region to adjoin a gate electrode;
• configuring the body region and the source region to extend from a first surface into a semiconductor body;
• configuring the drain region to extend from a second surface into the semiconductor body;
• performing a first implantation of a doping material of a first conduction type into the semiconductor body such that an implantation maximum of the first implantation lies within the semiconductor body set back from the channel region;
• performing a second implantation of a doping material of the first conduction type such that an implantation maximum of the second implantation lies within the semiconductor body below the implantation maximum of the first implantation;
• performing the second implantation with a lower dose than a dose of the first implantation;
• performing an outdiffusion of the doping material;
• and
• performing an additional implantation of a doping material of the first conduction type into the semiconductor body such that an implantation maximum of the additional implantation lies near the channel region.