Method of fabricating a high-voltage transistor with a multi-layered extended drain structure

Abstract

A method for fabricating a high-voltage transistor with an extended drain region includes forming parallel arranged drift regions, each of which is interleaved with an insulating layer and a conducting layer that functions as a field plate. Source and body regions of opposite conductivity types are formed, with the body regions separating the source regions from the drift regions. An insulated gate is formed adjacent the body region. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure, It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).

Dependencies are inferred from the claim text.