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US 6,665,847 B1Granted
Accurate and realistic corner characterization of standard cells
AssigneeCypress Semiconductor Corporation
InventorDinesh Maheshwari
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AssigneeCypress Semiconductor Corporation
InventorDinesh Maheshwari
Estimating the term…
A memory resident circuit cell model for characterizing an integrated circuit cell. The present invention comprises a first aggregate value representing a best case corner and a second aggregate value representing a worst case corner. In the present embodiment, the first and second aggregate value comprise a first delay representation accounting for timing variations of the cell relative to cross-coupling within the cell and a second delay representation accounting for timing variations of the cell relative to over-the-cell-routing-coupling. The first and second aggregate value further comprise a third delay representation accounting for timing variations of the cell for pin-input-capacitance and a fourth delay representation accounting for timing variations of the cell relative to delays due to near simultaneous input switching. The first and second aggregate value further comprise a fifth delay representation accounting for timing variations of the cell relative to interdependent set up, hold, delay variations for sequential cells.
A memory resident circuit cell model for use by design tools for characterizing an integrated circuit cell, said circuit cell model comprising:
A memory resident circuit cell model for use by design tools for characterizing an integrated circuit cell, said circuit cell model comprising:
A memory resident circuit cell model for use by design tools for characterizing an integrated circuit cell, said circuit cell model comprising:
Dependencies are inferred from the claim text.