Microprocessor instruction result obfuscation
AssigneeSun Microsystems, Inc.
InventorAlan Folmsbee
Life of this patent
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Abstract
A CPU executes program instructions which result in valid and invalid intermediate results. By selecting the desired intermediate results, a program is able to be successfully executed. Analysis of the intermediate results must avoid plausible wrong results. A programmable feature allows the instruction decoder to provide plural answers, including plausible wrong answers. Instruction output selection logic selects a predetermined buffer, and this permits further microprocessor operation with the correct intermediate result.
Claims25
A particularly configurable microprocessor for processing computer programs which are selectively operable on said particularly configurable microprocessor, comprising:
- an instruction decoder including a plurality of buffers for receiving instructions, said instruction decoder being programmable so that it accepts instruction op codes in excess of a minimal set of instruction op codes required for program execution and storing plural answers in selected ones of the plurality of buffers;
- and
- logic circuitry for processing op codes received by said instruction decoder, said logic circuitry configured to process the accepted op codes including excess op codes to produce substantive and obfuscating results.
Dependencies are inferred from the claim text.