Digital matched filter circuit employing analog summation
AssigneeOki Electric Industry Co., Ltd.
InventorHideaki Odagiri
Life of this patent
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Abstract
A digital matched filter stores a series of values of a digital input signal in a memory, compares each stored value with a corresponding value of a known code, and generates an analog comparison result signal for each comparison. The analog comparison result signals are combined to obtain an analog sum signal, which is then converted to a digital output signal. The digital output signal is obtained in real time, because there is little or no processing delay in combining the analog comparison result signals. The circuits that generate and combine the analog comparison result signals are similar to digital circuits, enabling the digital matched filter to be integrated easily with other digital signal-processing circuits.
Claims17
A method of correlating a digital input signal with a known code, comprising the steps of:
- (a) storing a series of values of the digital input signal in a memory;
- (b) comparing each stored value of the digital input signal with a corresponding value of the known code;
- (c) generating respective analog comparison result signals for all said stored values simultaneously and switching a plurality of current sources on and off according to comparison results obtained in said step (b);
- (d) combining the analog comparison result signals to obtain an analog sum signal, wherein the analog comparison result signals are current signals;
- and
- (e) converting the analog sum signal to a digital output signal.
A method of correlating a digital input signal with a known code, comprising the steps of:
- (a) storing a series of values of the digital input signal in a memory
- (b) comparing each stored value of the digital input signal with a corresponding value of the known code;
- (c) generating respective analog comparison result signals for all said stored values simultaneously;
- (d) combining the analog comparison result signals to obtain an analog sum signal, wherein the analog comparison result signals are voltage signals represented by charges stored in a plurality of capacitors;
- and
- (e) converting the analog sum signal to a digital output signal.
A method of correlating a digital input signal with a known code, comprising the steps of:
- (a) storing a series of values of the digital input signal in a memory;
- (b) comparing each stored value of the digital input signal with a corresponding value of the known code;
- (c) generating respective analog comparison result signals for all said stored values simultaneously;
- (d) combining the analog comparison result signals to obtain an analog sum signal, wherein each analog comparison result signal among the analog comparison result signals is a multi-level signal representing a difference between one the stored value of the digital input signal and the corresponding value of the known code;
- and
- (e) converting the analog sum signal to a digital output signal.
A digital matched filter for comparing a digital input signal with a known code, comprising:
- a code generator generating the known code;
- a plurality of unit processing circuits coupled to the code generator, storing respective values of the digital input signal, comparing the stored values with corresponding values of the known code, and generating respective current signals indicating comparison results;
- a current summing circuit coupled to the plurality of unit processing circuits, summing said current signals to obtain an output current signal;
- and
- an analog-to-digital converter coupled to the current summing circuit, converting the output current signal to a digital output signal;
- wherein each one of the unit processing circuits separately comprises:
- a memory circuit storing one bit of the digital input signal;
- a logic gate performing an exclusive logical operation on said one bit of the digital input signal and a corresponding bit of the known code;
- and
- a digital-to-analog converter converting an output of the logic gate to one of said current signals.
A digital matched filter for comparing a digital input signal with a known code, comprising:
- a code generator generating the known code;
- a plurality of unit processing circuits coupled to the code generator, storing respective values of the digital input signal, comparing the stored values with corresponding values of the known code, and generating respective current signals indicating comparison results;
- a current summing circuit coupled to the plurality of unit processing circuits, summing said current signals to obtain an output current signal;
- and
- an analog-to-digital converter coupled to the current summing circuit, converting the output current signal to a digital output signal;
- wherein each one of the unit processing circuits separately comprises:
- a memory circuit storing one value of the digital input signal;
- and
- a digital-to-analog converter generating, as one of said current signals, a current representing a difference between the value stored in the memory circuit and a corresponding value of the known code.
A digital matched filter for comparing a digital input signal with a known code, comprising:
- a code generator generating the known code;
- a memory circuit storing a plurality of values of the digital input signal;
- a plurality of capacitors;
- a plurality of logic circuits coupled to the code generator, the memory circuit, and respective capacitors, comparing respective values of the digital input signal with corresponding values of the known code, thereby obtaining comparison results, and charging and discharging the capacitors according to the comparison results;
- an interconnecting circuit switchably interconnecting the capacitors, thereby obtaining an analog voltage signal representing a total charge stored in the capacitors;
- and
- an analog-to-digital converter coupled to the interconnecting circuit, converting the analog voltage signal to a digital output signal.
Dependencies are inferred from the claim text.