Semiconductor memory device including internal power circuit having tuning function
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsFukashi Morishita, Yasuhiko Taito, Akira Yamazaki, Mako Okamoto, Nobuyuki Fujii
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Abstract
A tuning control circuit includes fuse devices each shifting from a conductive state to an interrupted state in response to a program input from the outside, and signal driving circuits for driving the signal levels of tuning control signals in accordance with the states of the fuse devices. A reference voltage generating circuit generates a reference voltage corresponding to a reference value of a memory array voltage of a semiconductor memory device according to the invention in accordance with an electrical resistance value which is finely adjusted in response to the tuning control signals.
Claims17
A semiconductor memory device comprising:
- an internal circuit operating on supply of an internal source voltage;
- and
- an internal power circuit for receiving an external source voltage and generating said internal source voltage,
- said internal power circuit including:
- a plurality of internal lines;
- a plurality of program devices disposed in an area different from an area in which said plurality of internal lines are disposed and each shifting from a first state to a second state in response to a program input external to said internal power circuit;
- a plurality of signal driving circuits provided in correspondence with said plurality of program devices and each for driving a control signal having a level according to the state of a corresponding one of said plurality of program devices;
- and
- an internal voltage generating circuit for adjusting the level of said internal source voltage on the basis of said control signal driven by each of said plurality of signal driving circuits.
Dependencies are inferred from the claim text.