Synchronized pulse width modulator

A delta-sigma modulator for an analog-to-digital converter for converting an analog voltage signal to a digital output signal, comprising:

• an input for receiving the analog voltage signal;
• a first clock generator for generating a first clock signal at a first frequency;
• a pulse-width modulator-type quantizer that is responsive to the input analog voltage signal and to the first clock signal for producing a pulse train having a duty cycle that is proportional to the analog voltage signal level;
• a second clock generator for generating a second clock signal at a second frequency;
• a measuring mechanism that is responsive to the second clock signal for measuring the duty cycle of the pulse train over a sampling interval and outputting a density modulated serial digital data stream;
• and
• a signal processing stage for digitally processing the density modulated serial digital data and producing a digital output signal corresponding to the analog voltage signal.

A delta-sigma modulator for an analog-to-digital converter, comprising:

• (a) a source of time varying analog signals;
• (b) a signal integrating circuit having an input terminal and an output terminal, the source of analog signals being coupled to the input terminal and producing at the output terminal a changing output signal proportional to the integral of the analog signals;
• (c) a clocked resettable D flip-flop circuit having a clock input terminal, a reset input terminal and an output terminal, the reset input terminal of the flip-flop circuit being connected to the output terminal of the signal integrating circuit, the flip-flop circuit being structured to change state as a function of a charge state of the integrating circuit;
• (d) a single feedback path coupling the output terminal of the flip-flop circuit to the input terminal of the integrating circuit;
• (e) a counter circuit having a clock input terminal, a signal input terminal and an output terminal, the signal input terminal of the counter circuit being connected to the output terminal of the flip-flop circuit for counting a quantity of state changes of the flip-flop circuit during a sampling period;
• and
• (f) means for applying a plurality of different regularly occurring clock pulses to each of the clock input terminals of the flip-flop circuit and the counter circuit, the clock pulse being applied to the counter circuit having a period that is a submultiple of a period of the clock pulse being applied to the flip-flop circuit, and the period of the clock pulse being applied to the flip-flop circuit being a submultiple of the sampling period.

A method for using an electronic circuit to convert an analog input signal to a digital output signal, the method comprising:

• (a) receiving an analog input signal a source of time varying analog signals;
• (b) with the electronic circuit, receiving first and second clock signals at different frequencies, the frequency of the first clock signal being a submultiple of the frequency of the second clock signal;
• (c) with the electronic circuit, in response to the first clock signal using a delta-sigma modulation type quantizer circuit for quantizing the analog input signal;
• and
• (d) with the electronic circuit, in response to the second clock signal, counting a number of highs occurring during a sample period.