On-chip power supply noise reduction
AssigneeSun Microsystems, Inc.
InventorWilliam B. Gist
Life of this patent
Estimating the term…
Abstract
An apparatus and method are provided for damping a noise component of a power signal from a power source. The apparatus and method are able to produce a load current in phase with the noise component to lower an effective impedance of a circuit driven by the power source to damp the noise component. The apparatus and method are able to produce the load current in phase with the noise component between a first cutoff frequency and a second cutoff frequency. The first cutoff frequency is determined in part by a time constant and the second cutoff frequency is determined in part by the physical properties of the materials that form the apparatus.
Claims23
An integrated circuit comprising:
- a damping circuit capable of providing a first current component at an output of the damping circuit when a frequency value of a noise component of a power signal from a source of power is about equal to or less than a first cutoff frequency, and said damping circuit capable of providing a second current component at the output of the damping circuit when the frequency value of the noise component of the power signals is above the first cutoff frequency, the second current component having a frequency value that allows the second current component to flow substantially in phase with the noise component of the power signal to damp the noise component of the power signal on a power grid of said integrated circuit wherein, the second current component flows substantially in phase with the noise component of the power signal to about a second cutoff frequency of the damping circuit.
A method for offsetting a noise component of a power supply output signal received by an integrated circuit, the method comprising the steps of:
- producing a first current signal having a first amplitude value in the integrated circuit when the noise component of the power supply output signal is below a selected frequency value;
- and
- producing a second current signal having a frequency value in the integrated circuit when the noise component of the power supply output signal is at or above the selected frequency value, wherein the frequency value of the second current signal substantially matches a frequency value of the noise component to flow in phase with the noise component of the power supply output signal to offset the noise component of the power supply output signal by lowering an effective impedance of the integrated circuit for the power supply.
A circuit for providing a substantially resistive load to damp an oscillating noise component of a power signal from a power source external to said circuit, said circuit comprising,
- a bias voltage generator to generate a bias voltage representative of a voltage value between a first power source node and a second power source node of said circuit;
- a voltage to current converter responsive to the bias voltage generated by the bias voltage generator, for producing a current flow between the first power source node and the second power source node of said circuit in response to said bias voltage and said current flow having a frequency value, wherein the voltage to current converter is further responsive to the noise component of the power signal to produce the current flow between the first power source node and the second power source node of said circuit substantially in phase with the noise component of the power signal when the frequency value of the noise component reaches a selected frequency value;
- and,
- a resistor and a capacitor coupling the bias voltage generator and the voltage to current converter, the resistor and the capacitor defining said selected frequency value,
- whereby when the current flow is substantially in phase with the noise component, said circuit is capable of providing said substantially resistive load to damp the noise component of the power signal from the power source external to said circuit.
In an electronic device having an integrated circuit and a power source external to said integrated circuit for supplying power thereto on a bus coupling said integrated circuit and said power source, a circuit in said integrated circuit is provided for offsetting noise associated with said power source, said circuit comprising,
- a current mirror having an input portion and an output portion, the output portion of the current mirror providing a substantially resistive load to offset the noise associated with said power source;
- a current source to drive the input portion of the current mirror;
- and
- a capacitor coupled between the input portion and the output portion of the current mirror and the bus, the capacitor forming a charge share relationship with the output portion of the current mirror.
Dependencies are inferred from the claim text.