Circuit for post-silicon control of delay locked loop charge pump current
AssigneeSun Microsystems, Inc.
InventorsClaude Gauthier, Brian Amick, Dean Liu, Pradeep Trivedi
Life of this patent
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Abstract
A charge pump design that facilitates post-fabrication control of delay locked loop charge pump current is provided. The charge pump includes an adjustment device responsive to user controlled signals that are varied to achieve a desired amount of charge pump current. Such control of the charge pump current in a delay locked loop allows a designer to achieve a desired DLL performance characteristic after the DLL has been fabricated.
Claims22
An integrated circuit, comprising:
- a clock path for carrying a clock signal;
- a power supply path adapted to receive power from a power supply;
- a delay locked loop connected to the power supply path, comprising:
- a phase detector that detects a phase difference between a clock signal and a delayed clock signal,
- a charge pump, responsive to the phase detector, that outputs a current on a control signal,
- a bias generator, responsive to the control signal, that generates a bias voltage, and
- a voltage-controlled delay line, responsive to the bias voltage, that generates the delayed clock signal;
- and
- an adjustment circuit operatively connected to the charge pump, wherein the adjustment circuit, independent of the delayed clock signal is controllable to adjust the current output from the charge pump.
A delay locked loop comprising:
- a phase detector for detecting a phase difference between a clock signal and a delayed clock signal;
- a charge pump, responsive to the phase detector, that outputs a current on a control signal;
- a bias-generator, responsive to the control signal, that generates a bias voltage;
- a voltage-controlled delay line, responsive to the bias voltage, that generates the delayed clock signal;
- and
- an adjustment circuit operatively connected to the charge pump, wherein the adjustment circuit, independent of the delayed clock signal, is controllable to adjust the current output from the charge pump.
A method for modifying an operating characteristic of a delay locked loop, comprising:
- producing a delayed clock signal;
- comparing the delayed clock signal to a clock signal;
- generating a current signal using a charge pump responsive to the comparing;
- selectively adjusting the current signal using an adjustment circuit operatively connected to the charge pump, wherein the adjustment circuit operates independent of the delayed clock signal;
- and
- generating a bias voltage to a voltage-controlled delay line dependent on the selectively adjusting, wherein the voltage-controlled delay line produces the delayed clock signal.
An integrated circuit, comprising:
- delay locked loop means for generating a delayed clock signal, wherein the delay locked loop means comprises:
- comparing means for detecting a phase difference between a clock signal and the delayed clock signal,
- charge pumping means for generating a current on a control signal, wherein the charge pumping means is responsive to the comparing means,
- bias generating means for generating a bias voltage, wherein the bias generating means is responsive to the control signal, and
- delaying means for generating the delayed clock signal, wherein the delaying means is responsive to the bias voltage;
- and
- adjusting means for adjusting the current output from the charge pump, wherein the charge pumping means is responsive to the adjusting means, and wherein the adjusting means operates independent of the delayed clock signal.
Dependencies are inferred from the claim text.