Inverter output circuit
AssigneeRohm Co., Ltd.
InventorShizuka Yokoi
Life of this patent
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Abstract
An inverter output circuit comprises first though third inverters connected in series. The low-potential output of the first inverter has an offset level. The input threshold voltage of the second inverter is set up at a lower level than the low-level offset potential of the first inverter as the level of supply voltage Vdd falls below a predetermined reference level. Thus, the third inverter is fixed to a predetermined condition if the supply voltage drops below the reference voltage, thereby preventing erratic operations of a load connected to the inverter output circuit caused by, for example, a power shut down and a brownout.
Claims13
An inverter output circuit, comprising:
- a first inverter impressed by a supply voltage given by the difference between a first (high) level potential of a first power supply and a second (low) potential of a second power supply, said first inverter adapted to generate, in accordance with the level of an input signal fed, either
- a high level output which equals the high potential of said first power supply, or
- a low level (L-level) offset output which is higher than said second potential of said second power supply by a predetermined offset voltage;
- and
- a second inverter impressed by said supply voltage and receiving the output of said first inverter, said second inverter adapted to output either said high level output or a low level output in accordance with the level of the output received, wherein
- the input threshold voltage of said second inverter is set up at a higher level than said L-level offset output when said supply voltage is higher than a predetermined reference voltage, and otherwise set up at a lower level than said L-level offset output.
Dependencies are inferred from the claim text.