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US 6,664,813 B2Granted
Pseudo-NMOS logic having a feedback controller
AssigneeHewlett-Packard Development Company, L.P.
InventorsMichael A McCurdy, Edward Chang
Life of this patent
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Abstract
A pseudo-NMOS circuit includes a load PFET electrically connected between a power supply and an output node, and an NFET circuit having a plurality of inputs connected between the output node and ground. A feedback PFET is electrically connected between the power supply and the output node, in parallel with the load PFET, and is controlled by a signal at the output node of the pseudo-NMOS circuit.
Claims6
A pseudo-NMOS circuit comprising:
- a first PFET electrically connected between a power supply and an output node;
- an NFET circuit connected between said output node and ground and having a plurality of inputs;
- a second PFET electrically connected between said power supply and said output node, said second PFET being controlled by a signal at said output node;
- a control circuit for turning said second PFET ON and OFF based on said signal at said output node;
- wherein said control circuit sets said second PFET to ON when said signal at said output node is HIGH, and sets said second PFET to OFF when said signal at said output node is LOW;
- wherein a gate of said first PFET is connected to said ground, and a gate of said second PFET is connected to a feedback signal from said output node.
3 more elements
Dependencies are inferred from the claim text.