Multi-level programmable voltage control and output buffer with selectable operating voltage

In a computer system having a select circuit, the select circuit having a first switch circuit, a second switch circuit and a logic circuit, a method for generating a select signal, the select signal for causing another circuit within the computer system to operate at a first or second voltage level, the method comprising the steps of:

• selecting between a first metal mask option and a second mettle mask option using the first switch circuit, wherein the first metal mask option corresponds to the first voltage level and the second metal mask option corresponds to the second voltage level;
• transmitting a switch signal from the first switch circuit to the logic circuit, the switch signal representing the selected metal mask option;
• transmitting a fuse signal from the second switch circuit to the logic circuit, the fuse signal representing a voltage level corresponding to the unselected metal mask option;
• and
• transmitting the select signal to another circuit, the select signal being one of the switch signal or the fuse signal.

An integrated circuit device comprising:

• an input circuit;
• logic circuitry coupled to the input circuit;
• an output circuit coupled to the logic circuitry;
• and
• a select circuit coupled to the input circuit, output circuit and logic circuitry, the select circuit for generating a select signal, the select signal for causing the input circuit, output circuit and logic circuitry to operate according to a first state or a second state;
• wherein the select circuit comprises:
• a first switch circuit;
• a second switch circuit, and
• a logic circuit coupled to the first switch circuit and the second switch circuit, the logic circuit for producing the select signal, wherein the select signal is generated to a first signal transmitted from the first switch circuit and a second signal transmitted from the second switch circuit.

An output buffer comprising:

• a first driving circuit;
• a second driving circuit;
• and
• an output pad coupled the first driving circuit and the second driving circuit, and configured to receive a data signal, a control signal, and a voltage select signal, the voltage select signal for selecting an output buffer operation at a first voltage level or a second voltage level, the output buffer further configured to maintain an approximately constant slew rate when operating at either the first or second voltage level.

An output buffer having an output pre-driver, the output pre-driver comprising:

• first driver means for driving an output driver transistor when the output buffer is in a first state;
• and
• second driver means for driving the output driver transistor when the output buffer is in a second state;
• wherein the first driver means comprise a first set of three series coupled transistors and wherein the second driver means comprise a second set of four series coupled transistors.