Method of using partially defective programmable logic devices

A method for using a FPGA having at least one localized defect, comprising the steps of:

• loading a first design into the FPGA;
• testing the FPGA to determine if it meets a predetermined specification associated with the first design;
• if the FPGA meets the predetermined specification associated with the first design, accepting the FPGA as suitable for the first designs;
• if the FPGA does not meet the predetermined specification associated with the first design, performing the following steps:
• loading a second design into the FPGA;
• testing the FPGA to determine if it meets a predetermined specification associated with the second design;
• if the FPGA meets the predetermined specification associated with the second design, accepting the FPGA as suitable for the second design, and as not suitable for the first design.

A method for accepting a plurality of dies on a wafer for a plurality of customer designs, comprising:

• means for determining a localized defect on a die of the plurality of dies;
• means for testing the die with a customer design of the plurality of customer designs;
• and
• when the die passes the testing with the customer design, means for recording a first indication identifying the die on the wafer and a second indication of which customer design test passed.

A method of configuring a programmable logic device comprising:

• testing the programmable logic device for proper implementation of a first design;
• if the logic device fails to properly implement the first design, testing the programmable logic device for proper implementation of a second design;
• and
• if the programmable logic device fails to properly implement the first design and succeeds at properly implementing the second design, configuring the programmable logic device to implement the second design.

A programmable logic device comprising:

• programmable elements, wherein some of the programmable elements perform properly;
• and at least one of the programmable elements has a defect;
• and
• a configuration memory configured to store a first configuration having programmable elements that perform properly and not having the at least one of the programmable elements that has the defect, wherein when the configuration memory is configured to store a second configuration, the second configuration has programmable elements that perform properly and has the at least one of the programmable elements that has the defect.

A method for providing an integrated circuit (IC) having programmable functions and routing resources, to a customer, comprising the steps of:

• a. testing the IC for gross defects;
• b. if a gross defect is not detected, testing memory cells associated with the programmable functions and routing resources;
• c. if a memory cell has a localized defect, testing the IC using a specific customer design;
• d. if the IC fails the testing in step c, rejecting the IC as not suitable to implement the specific customer design;
• e. if the IC passes the testing in step c, testing the IC for performance;
• and
• f. if the IC passes the testing in step e, supplying the IC to the customer as suitable to implement only the customer design.

A method for providing an integrated circuit (IC) having programmable functions and routing resources, comprising the steps of:

• testing the IC for defects;
• when an IC has a defect, testing the IC using a specific design;
• and
• if the IC having the defect, passes the testing using the specific design, designating the IC as acceptable for implementing the specific design.