Apparatus having adjustable operational modes and method therefore
AssigneeIntel Corporation
InventorsLawrence T. Clark, Michael W. Morrow, Gregory B. Tucker, Yuan-Po Ypt Tseng, Ali Minaei, Jay Heeb
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Abstract
Briefly, in accordance with one embodiment of the invention, an integrated circuit has a voltage regulator and a clock divider that may be used to adjust the operational frequency and/or voltage potential of the integrated circuit to reduce the power consumption of the integrated circuit while in operation.
Claims34
An apparatus comprising:
- a static random access memory;
- and
- a processor coupled to the static random access memory, the processor comprising:
- a phase lock loop adapted to provide an output signal;
- a first divider adapted to receive the output signal from the phase lock loop;
- and
- a second divider adapted to receive the output signal from the phase lock loop and provide an output signal.
An integrated circuit comprising:
- a phase lock loop adapted to provide an output signal to a feedback divider and a clock divider, wherein the phase lock loop is adapted to receive an output signal of the feedback divider.
A method comprising:
- reducing the frequency of a clock signal to at least a portion of a processor while the processor is in operation.
A method of reducing the amount of power consumed by a processor, the processor having a phase lock loop and a clock divider, the method comprising:
- reducing the frequency of an output of the clock divider while substantially maintaining the frequency of an input signal to the phase lock loop.
An article comprising:
- a storage medium having stored thereon instructions, that, when executed by a computing platform, results in:
- reducing the frequency of a clock divider;
- and
- maintaining the frequency of an output signal of a feedback divider.
An integrated circuit comprising:
- a phase lock loop adapted to provide an output signal to a feedback divider and a clock divider, wherein the phase lock loop is adapted to receive an output signal of the feedback divider, and the clock divider is adapted to provide at least two clock signals of different frequency.
Dependencies are inferred from the claim text.