Offset peak current mode control circuit for multiple-phase power converter

A multiple-phase DC-to-DC voltage converter comprising:

• a plurality of converter modules connected to a common load and having a common input voltage source;
• a current sensor coupled to a sensing resistor disposed in series between said common input voltage source and said load to derive a current sense signal corresponding to current passing through said sensing resistor;
• a voltage error sensor coupled to said load to derive a voltage error signal corresponding to difference between an output voltage of said voltage converter and a reference voltage;
• a plurality of current mode control circuits connected to respective ones of said plurality of converter modules, said current mode control circuits receiving said current sense signal and said voltage error signal, said current mode control circuit providing gate driving signals to said converter modules having a duty cycle determined by said current sense signal and said voltage error signal;
• and
• a phase select circuit coupled to said plurality of current mode control circuits and alternately providing said plurality of current mode control circuits a phase select signal to initiate successive phases of operation within a power cycle;
• wherein, when there is an overlap between adjacent ones of said successive phases, said current mode control circuits are operative to compare said current sense signal and said voltage error signal during a non-overlapping portion of a phase, and stretch a duration of said duty cycle of said gate driving signals to extend at least partially into an overlapping portion of said phase.