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US 6,664,616 B2Granted
Semiconductor device and manufacturing method thereof
AssigneeHitachi, Ltd.
InventorsKunihiro Tsubosaki, Toshio Miyamoto
Life of this patent
Estimating the term…
Abstract
A semiconductor chip 2 is disposed within a device hole as formed in a tape base material 1a of a tape carrier 1, which chip is smaller in thickness than the tape base material 1a, and then sealing is performed using a seal resin 3 to permit both the principal surface and back surface of such semiconductor chip 2 to be coated therewith. And, the position of the semiconductor chip 2 in a direction along the thickness of the tape base 1a is set to correspond to a stress neutral plane of the TCP as a whole.
Claims15
A semiconductor device comprising:
- a semiconductor chip having a principal surface and a back surface, and including an integrated circuit and a plurality of external terminals formed on said principal surface;
- a tape carrier having a base substrate and a plurality of lead portions formed on one surface of said base substrate, said base substrate having a device hole and a plurality of through hole wirings formed at both sides of said device hole, said plurality of through hole wirings extending from said one surface to the other surface of said base substrate and being electrically connected to said plurality of lead portions,
- wherein said semiconductor chip is disposed in said device hole of said base substrate and first ends of said plurality of lead portions are electrically connected to said plurality of external terminals of said semiconductor chip, and
- wherein said semiconductor chip has a reduced thickness defined by spin-etching of said back surface to effect a thinning of said semiconductor chip to a thickness less than that of said tape carrier,
- a seal resin material sealing said thinned semiconductor chip so that said principal surface and said back surface of said semiconductor chip are covered with said seat resin material;
- and
- a plurality of bump electrodes formed on said one surface of said base substrate at said plurality of through hole wirings and being electrically connected to said plurality of lead portions, said plurality of bump electrodes providing a connection with a printed circuit board, while said plurality of through hole wirings at the other surface of said base substrate providing a connection with another device to be mounted on said tape carrier.
4 more elements
A semiconductor device comprising:
- a semiconductor chip having a principal surface and a back surface, opposite to said principal surface, and including an integrated circuit and a plurality of external terminals formed on said principal surface;
- a base wiring substrate having a plurality of lead portions formed on one surface of said base wiring substrate, said base wiring substrate having a device hole and a plurality of through hole wirings formed at both sides of said device hole, said plurality of through hole wirings extending from said one surface to the other surface of said base wiring substrate and being electrically connected to said plurality of lead portions,
- wherein said semiconductor chip is disposed in said device hole of said base wiring substrate and said plurality of lead portions are electrically connected to said plurality of external terminals of said semiconductor chip, and
- wherein said semiconductor chip has a reduced thickness defined by spin-etching of said back surface to effect a thinning of said semiconductor chip to a thickness less than that of said base wiring substrate;
- a seal resin material sealing said thinned semiconductor chip so that said principal surface and said back surface of said semiconductor chip are covered with said seal resin material;
- and
- a plurality of bump electrodes formed on said one surface of said base wiring substrate at said plurality of through hole wirings and being electrically connected to said plurality of lead portions, said plurality of bump electrodes providing a connection with a printed circuit board, while said plurality of through hole wirings at the other surface of said base wiring substrate providing a connection with another device to be stacked on said base wiring substrate.
4 more elements
Dependencies are inferred from the claim text.