Electronic package with high density interconnect and associated methods

#Embodiments of the present invention relate generally to electronics packaging and, more particularly, to an electronic package that includes an integrated circuit die or an integrated circuit package coupled to a substrate with a high density interconnect, and to manufacturing methods related thereto.

#Integrated circuits (ICs) are typically assembled into electronic packages by physically and electrically coupling them to a substrate made of organic or ceramic material. One or more IC packages can be physically and electrically coupled to a substrate such as a printed circuit board (PCB) or motherboard to form a higher level electronic package or “electronic assembly”. The “electronic assembly” can be part of an “electronic system”. An “electronic system” is broadly defined herein as any product comprising an “electronic assembly”. Examples of electronic systems include computers (e.g., desktop, laptop, hand-held, server, etc.), wireless communications devices (e.g., cellular phones, cordless phones, pagers, etc.), computer-related peripherals (e.g., printers, scanners, monitors, etc.), entertainment devices (e.g., televisions, radios, stereos, tape and compact disc players, video cassette recorders, MP3 (Motion Picture Experts Group, Audio Layer 3) players, etc.), and the like.

#In the field of electronic systems there is an incessant competitive pressure among manufacturers to drive the performance of their equipment up while driving down production costs. This is particularly true regarding the packaging of ICs, where each new generation of packaging must provide increased performance while generally being smaller or more compact in size. As market forces drive equipment manufacturers to produce electronic systems with increased performance and decreased size, IC packaging accordingly also needs to support these requirements.

#FIG. 1 is a block diagram of an electronic system incorporating at least one electronic package with a high density interconnect, in accordance with one embodiment of the invention;

#FIG. 2 illustrates a cross-sectional representation of a prior art electronic package comprising a die mounted on an IC package substrate, which in turn is mounted on a printed circuit board (PCB);

#FIG. 3 illustrates a top view of a prior art die bonding area of a portion of an IC package substrate;

#In the following detailed description of embodiments of the invention, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific preferred embodiments in which the disclosure may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice them, and it is to be understood that other embodiments may be utilized and that mechanical, chemical, electrical, and procedural changes may be made without departing from the spirit and scope of the present disclosure. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of embodiments of the present invention is defined only by the appended claims.

#Embodiments of the present invention provide a solution to package density constraints in the form of dimension design rules that specify minimum sizes of terminals on IC substrates, as well as minimum width and spacing of traces on the substrate. Various embodiments are illustrated and described herein.

#In one embodiment, an IC die having a dense formation of terminals or lands is mounted on a die mounting region of an IC package substrate. The die mounting region comprises a corresponding dense formation of terminals or lands that are arranged in a geometrical pattern that maximizes the density of the formation of such terminals, while being simultaneously constrained by the size of individual terminals and by the width and spacing of traces on the substrate that are coupled to the terminals.