Method of forming smaller trench line width using a spacer hard mask

A method of manufacturing an integrated circuit having trench lines comprising:

• depositing an anti-reflective coating (ARC) layer over a layer of material;
• depositing a photoresist pattern over the ARC layer;
• etching the ARC layer according to the photoresist pattern to form an aperture in the ARC layer;
• depositing a layer of spacer material over the ARC layer and the aperture;
• etching the layer of spacer material to form spacers along walls of the aperture, each of the spacers including a tail wherein the spacers include a top portion having a first width and a bottom portion including the tail and having a second width, the second width being greater than the first width, the tail having a convex shape, the step of etching the spacer material comprising controlling the etch chemistry using heavy polymer deposited dielectric gas selected from CH3F and CH2F2to form the spacers with the tails;
• forming trench lines in the layer of material using the ARC layer and the spacers as a mask.

A method of forming trench lines in an integrated circuit comprising:

• providing an anti-reflective coating (ARC) layer over a layer of material;
• etching the ARC layer to form ARC features using a photoresist pattern provided over the ARC layer;
• forming spacers adjacent lateral sides of the ARC features by etching a layer of spacer material deposited over the ARC features, each of the spacers including a tail formed by controlling the etch chemistry using a heavy polymer deposited dielectric gas selected from CH3F and CH2F2;
• and
• etching trench lines in the layer of material using the spacers and ARC features as a mask to define the width of the trench lines;
• wherein the width of a top portion of the spacers is smaller than the width of a bottom portion of the spacers, the bottom portion including the tail, the tail having a convex shape.