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US 6,664,173 B2Granted
Hardmask gate patterning technique for all transistors using spacer gate approach for critical dimension control
AssigneeIntel Corporation
InventorsBrian Doyle, Mark Doczy, Pat Stokley
Life of this patent
Estimating the term…
Abstract
An electrical element may be made by providing a hardmask unit that has a double gate stack with a first gate layer, a first hardmask layer formed over the first gate layer, a second gate layer formed over the first hardmask layer, and a second hardmask layer formed over the second gate layer. A first spacer for a first element is formed at a location at least partially determined by the presence of the second hardmask layer, and a second structure for a second element is formed at a location at least partially determined by the presence of the first hardmask layer.
Claims44
A method of making electrical elements comprising:
- providing a hardmask unit, the hardmask unit comprising a first gate layer, a first hardmask layer formed over the first gate layer, a second gate layer formed over the first hardmask layer, and a second hardmask layer formed over the second gate layer;
- forming a first spacer for a first element on the hardmask unit, the location of the first spacer being at least partially determined by the presence of the second hardmask layer;
- and
- forming a second structure for a second element on the hardmask unit, the location of the second structure being at least partially determined by the presence of the first hardmask layer.
1 more element
A method of making electrical elements comprising:
- providing a hardmask unit comprising a first gate layer, a first hardmask layer formed over the first gate layer, a second gate layer formed over the first hardmask layer, and a second hardmask layer formed over the second gate layer;
- forming a first structure on the hardmask unit by removing a portion of the second hardmask layer and the second gate layer from at least a portion of an area adjacent to the first structure, the first structure comprising a section of the second hardmask layer and the second gate layer;
- forming a first spacer for a first element on the hardmask unit by
- removing the second hardmask layer from the first structure,
- applying a spacer material adjacent to a sidewall of the first structure, and
- removing the second gate layer from the first structure;
- removing the first hardmask layer from at least a portion of an area adjacent to the first spacer;
- removing the spacer material from the first spacer;
- forming a second structure for a second element on the hardmask unit by removing a portion of the first hardmask layer;
- removing the first gate layer adjacent to the first spacer;
- and
- removing the first gate layer adjacent to the second structure.
9 more elements
A method of making electrical elements comprising:
- providing a hardmask unit comprising a first gate layer, a first hardmask layer formed over the first gate layer, a second gate layer formed over the first hardmask layer, and a second hardmask layer formed over the second gate layer;
- removing a portion of the second hardmask layer and the second gate layer to form a first structure, the first structure comprising a section of the second hardmask layer and the second gate layer;
- removing the second hardmask layer from the first structure;
- depositing a layer of spacer material on the hardmask unit;
- removing a portion of the layer of spacer material to form a first spacer part adjacent to a sidewall of the first structure;
- removing the second gate layer from the first structure;
- removing the first hardmask layer adjacent to the first spacer part;
- removing the first spacer part to expose a first spacer portion of the first hardmask layer under the first spacer part;
- removing a portion of the first hardmask layer to form a second structure portion of the first hardmask layer;
- removing the first gate layer adjacent to the first spacer portion of the first hardmask layer;
- removing the first gate layer adjacent to the second structure portion of the first hardmask layer;
- removing the first hardmask layer from the first spacer portion to expose a first element, the first element comprising the first gate layer;
- and
- removing the first hardmask layer from the second structure portion to expose a second element, the second element comprising the first gate layer.
11 more elements
Dependencies are inferred from the claim text.