Method for making multi-layer printed circuit board registration

A method for making a multilayer printed circuit board, said method comprising the steps of:

• forming a first layer of said board, said first layer comprising a first insulating layer;
• forming a second layer of said board, said second layer comprising a second insulating layer and a first alignment feature and first circuitization on a surface of said second insulating layer, said alignment feature visible laterally at an edge of said second layer;
• forming a third layer of said board, said third layer comprising a third insulating layer and a second alignment feature and second circuitization on a surface of said third insulating layer, said second alignment feature visible laterally at an edge of said third layer;
• forming a fourth layer of said board, said fourth layer comprising a fourth insulating layer and a third alignment feature and third circuitization on a surface of said fourth insulating layer, said third alignment feature visible laterally at an edge of said fourth layer;
• laminating said first, second, third and fourth layers to each other such that said first insulating layer has an interior surface adjacent to said first alignment feature and said first circuitization and an opposite surface which is exposed, said second alignment feature and said second circuitization are adjacent to a surface of said second insulating layer opposite said first alignment feature and said first circuitization, and said third alignment feature and said third circuitization are adjacent to a surface of said third insulating layer opposite said second alignment feature and said second circuitization,
• determining from said first, second and third alignment features if said second, third and fourth layers are properly aligned with each other after said laminating step;
• and
• if so, circuitizing said exposed surface of said first insulating layer after said laminating step at a predetermined location on said first insulating layer in accordance with proper alignment of said second, third and fourth layers with each other, and
• if not, circuitizing said exposed surface of said first insulating layer after said laminating step offset from said predetermined location in accordance with misalignment of said second, third and fourth layers with each other, the circuitization of said first insulating layer being offset from said predetermined location to compensate for the misalignment.