A system for transforming an instruction in a first bit architecture to an instruction in a second bit architecture, wherein the system is capable of processing instructions in both the first bit and second bit architectures, comprising:
- means for transforming code to an instruction in the first bit architecture having an operation code and at least one operand;
- means for accessing a transform table including information for transforming a plurality of instructions in the first bit architecture to the second bit architecture, wherein the transform table indicates for each of a plurality of operation codes either information indicating to transform an instruction including the operation code in the first bit architecture or not to transform the instruction wherein the transform table indicates that at least one instruction is not to be transformed from the first bit architecture to the second bit architecture, wherein the instruction in the first bit architecture that is not transformed as indicated in the transform table executes successfully in the computer system;
- and
- means for transforming the instruction in the first bit architecture to a corresponding instruction in the second bit architecture if the transform table includes information indicating to transform the instruction in the first bit architecture, wherein the transformation is based on transformation operations that modify the instruction in the first bit architecture to generate the instruction in the second bit architecture.