Method and system for software control of hardware branch prediction mechanism in a data processor

A method for software manipulation of branch prediction mechanism in a data processor, said method comprising the steps of:

• predicting a first branch path to be taken by said processor determined by hardware prediction of a processor branch prediction unit, when a first software-generated indicator is in a first state;
• predicting a second branch path to be taken by the processor determined by software prediction, said second branch path being indicated by a second software-generated indicator, when the first software indicator is in a second state, wherein for synchronization branches, the first software-generated indicator communicates the second state to the processor, so that software prediction is used for the branches instead of hardware prediction;
• and
• setting the second software-generated indicator such that the software prediction consistently predicts in one certain branch direction for the branches, so that lock contention traffic is reduced.

A method for software manipulation of branch prediction mechanism in a data processor, said method comprising the steps of:

• predicting a first branch path to be taken by said processor determined by hardware prediction of a processor branch prediction unit, when a first software-generated indicator is in a first state;
• predicting a second branch path to be taken by the processor determined by software prediction, said second branch path being indicated by a second software-generated indicator, when the first software indicator is in a second state;
• selectively using a conditional branch instruction and a subsequent unconditional branch instruction as a hint to a memory system, wherein the second state of the first software indicator is communicated to the processor, so that software prediction is used for the conditional branch instruction instead of hardware prediction;
• directing, by the state of the second software indicator when the unconditional branch instruction is not to be used as a hint, that the conditional branch be taken, so that program execution branches around the unconditional branch instruction;
• and
• directing, by the state of the second software indicator when the unconditional branch instruction is to be used as a hint, that the conditional branch be not taken, so that when the unconditional branch instruction is used as a hint and the unconditional branch instructions are speculatively executed, the memory subsystem prefetches, from memory, data targeted by the unconditional branch instructions.

A system for software manipulation of branch prediction mechanism in a data processor, said system comprising:

• means for setting a first software indicator to a first state when hardware prediction is to be used, wherein the first software indicator comprises a particular bit in an instruction;
• means for setting the first software indicator to a second state when software prediction is to be used;
• means for setting a second software indicator generated by a software prediction unit, such that the software prediction consistently predicts in one particular branch direction for the branches, so that branch history table aliasing is reduced;
• means for predicting a branch path by a processor utilizing a processor hardware branch prediction unit, when a first software indicator communicates a first state to the processor;
• means for predicting the branch path by the processor utilizing the second software indicator, when the first software indicator communicates a second state to the processor, wherein for branches at segments of seldom used code, the first software indicator provides the second state to the processor, so that software prediction is used for the branches instead of hardware prediction.

A system for software manipulation of branch prediction mechanism in a data processor, said system comprising:

• means for predicting a branch path by a processor utilizing a processor hardware branch prediction unit, when a first software indicator communicates a first state to the processor;
• means for predicting the branch path by the processor utilizing a second software indicator generated by a software prediction unit, when the first software indicator communicates a second state to the processor;
• wherein for synchronization branches, the system further comprising means for setting the first software indicator to communicate the second state to the processor, so that software prediction is used for the branches instead of hardware prediction;
• and
• means for setting the second software indicator such that the software prediction consistently predicts in one particular branch direction for the branches, so that branch history table aliasing is reduced and instructions within the critical section (guarded by atomic readwrite) can be executed speculatively.

A system for software manipulation of branch prediction mechanism in a data processor, said system comprising:

• means for predicting a branch path by a processor utilizing a processor hardware branch prediction unit, when a first software indicator communicates a first state to the processor;
• means for predicting the branch path by the processor utilizing a second software indicator generated by a software prediction unit, when the first software indicator communicates a second state to the processor;
• means for selectively using a conditional branch instruction and a subsequent unconditional branch instruction as a hint to a memory system, the second state of the first software indicator is communicated to the processor, so that software prediction is used for the conditional branch instruction instead of hardware prediction;
• means for directing, by the state of the second software indicator when the unconditional branch instruction is not to be used as a hint, that the conditional branch be taken, so that program execution branches around the unconditional branch instruction;
• and
• means for directing, by the state of the second software indicator when the unconditional branch instruction is to be used as a hint, that the conditional branch be not taken, so that when the unconditional branch instruction is used as a hint and the unconditional branch instructions are speculatively executed, the memory subsystem prefetches, from memory, data targeted by the unconditional branch instructions.