Memory access system
AssigneeBroadcom Corporation
InventorSophie Wilson
Life of this patent
Estimating the term…
Abstract
A memory access system is described which generates two memory addresses from a single memory access instruction which identifies a register holding at least two packed objects. In the preferred embodiment, the contents of a base register is combined respectively with each of two or more packed objects in an offset register.
Claims19
A memory access system comprising:
- a register file having a plurality of registers each having the same predetermined bit capacity and capable of holding one or more objects depending on the bit length of the object, said registers including at least a first address register holding at least two packed objects for use in identifying respective memory addresses;
- a register accessing circuit operative responsive to a memory access instruction to access said first address register in said register file;
- address generating circuitry for generating at least first and second memory addresses from said at least two packed objects, the second memory addresses lacking a predetermined relationship to the first memory addresses;
- and
- memory access circuitry for accessing a memory using said first and second addresses.
A computer system comprising:
- a memory holding data objects;
- a memory access unit for accessing said memory to retrieve data objects;
- a decode unit for decoding instructions for use in controlling said memory access unit;
- and
- a register file having a plurality of registers each having the same predetermined bit capacity and capable of holding one or more objects depending on the bit length of the objects;
- said registers including at least a first address register holding at least two packed objects for use in identifying respective memory addresses;
- wherein the memory access unit is responsive to a memory access instruction defining said first address register to access said first address register in said register file and to generate at least first and second independently determined memory addresses from said at least two packed objects, said addresses being used to access said memory, and the second memory addresses lacks a predetermined relationship to the first memory addresses.
A method of generating addresses for accessing a data memory, the method comprising:
- retrieving from a base register a base value representing at least one base address;
- retrieving from an index register at least one index value;
- wherein at least one of the base value and the index value comprises at least two packed objects;
- combining the base value and the index value to generate at least first and second addresses for accessing said memory;
- wherein said base register and index register are defined in a single computer instruction.
A method of accessing a memory holding data values, the method comprising:
- reading a memory access instruction which identifies at least a first address register holding at least two packed objects for use in identifying respective memory addresses;
- simultaneously generating at least first and second independently determined memory access addresses from said at least two packed objects, the second memory addresses lacking a predetermined relationship to the first memory addresses;
- and
- using said first and second memory access addresses to access said memory.
A computer program product comprising program code means capable of cooperating with a computer when loaded therein to effect memory accesses, said program code means including a memory access instruction which identifies at least a first address register holding at least two packed objects for use in identifying respective memory addresses such that first and second independently determined memory addresses are simultaneously generated by a computer on which the computer program product runs, and such that the second memory addresses lacks a predetermined relationship to the first memory addresses.
Dependencies are inferred from the claim text.