Method and apparatus for direct conveyance of physical addresses from user level code to peripheral devices in virtual memory systems
AssigneeHewlett-Packard Development Company, L.P.
InventorBoon Seong Ang
Life of this patent
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Abstract
A memory system and a set of user-level instructions that are callable from user-level code for converting virtual addresses to physical addresses and conveying the physical addresses to peripheral devices without requiring a system call. The system uses a translation look-aside buffer (TLB) implemented in a microprocessor. The contents of the TLB can be updated while processes are executing, allowing for virtual/physical addresses to be constantly updated and loaded into the buffer without requiring that the buffer be too large. Pages in use per transaction or user-level job are “pinned down” and pinned page counts per transaction or user-level job, as well as overall counts are maintained.
Claims19
A memory system for converting virtual addresses into physical addresses at the user code level and conveying the physical addresses to a peripheral device, the system comprising:
- a virtual memory having memory pages, each memory page having a virtual memory address and a corresponding physical memory address in a main memory;
- a microprocessor having a translation look-aside buffer which holds a subset of the virtual addresses for all the pages and their corresponding physical memory addresses in the main memory;
- and
- a set of user-code level software instructions stored in said main memory and executable by said microprocessor for converting a virtual memory address into the corresponding physical memory address, pinning the page, and conveying the physical memory address to the peripheral device at a user code level without requiring a system call and wherein the set of user level software instructions includes instructions for:
- incrementing a per-process pin page counter each time a new page is first pinned by a same process;
- and
- incrementing a system wide pin page counter, each time a new page is first pinned by any process within the system.
A set of user-code level software instructions executable by a microprocessor for converting a virtual address to a physical address, pinning an associated page, and conveying the physical address to a peripheral device without requiring a system call, the instructions comprising:
- a Trans_and_pin instruction for converting the virtual address to a physical address, pinning the page associated with the physical address and conveying the physical address to the peripheral, the Trans_and_pin instruction including:
- a <vaddr> source operand containing the virtual address to be converted;
- and
- a <target> source operand containing the address of the peripheral device to which the physical address is to be conveyed,
- and wherein said Trans_and_pin instruction:
- increments a per-process pin page counter each time a new page is first pinned by a process;
- and
- increments a system wide pin page counter, each time a new page is first pinned within the system.
Dependencies are inferred from the claim text.