JTAG-based software to perform cumulative array repair

An apparatus for repairing a plurality of arrays on a processor with an on chip built in self test engine on the processor, comprising:

• selecting means for selecting a subset of the plurality of arrays for testing;
• sending means for sending data patterns from the on chip built in self test engine to the subset of the plurality of arrays on the processor at a plurality of operating parameters;
• receiving means for receiving a response at the on chip built in self test engine from the subset of the plurality of arrays at the plurality of operating parameters;
• comparing means for comparing the response from the subset of the plurality of arrays to an expected response using the on chip built in self test engine.
• determining means for determining a failing subset of arrays in response to the response from the subset of the plurality of arrays being different from the expected response;
• and
• repair means, in response to a failing subset of arrays, for repairing said failing subset of arrays by scanning data into the failing subset of arrays, wherein the scanned data is used to establish repair values for the failing subset of arrays.

A computer program product included within a computer readable medium and executed by a data processing system for repairing a plurality of arrays on a processor with an on chip built in self test engine on the processor, the data processing system including the processor, comprising:

• instructions for selecting a subset of the plurality of arrays for testing;
• instructions for sending data patterns from the on chip built in self test engine to the subset of the plurality of arrays on the processor at a plurality of operating parameters;
• instructions for receiving a response at the on chip built in self test engine from the subset of the plurality of arrays at the plurality of operating parameters;
• instructions for comparing the response from the subset of the plurality of arrays to an expected response using the on chip built in self test engine;
• instructions responsive to a determination that the response from the subset of the plurality of arrays is different from the expected response, determining a failing subset of arrays;
• and
• instructions for repairing said failing subset of arrays utilizing a scan ring by scanning data into the failing subset of arrays, wherein the scanned data is used to establish repair values for the failing subset of arrays.