Write method and circuit for content addressable memory
AssigneeCypress Semiconductor Corporation
InventorStefan P. Sywyk
Life of this patent
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Abstract
According to one embodiment, the write circuitry of a content addressable memory (CAM) can include periphery circuits (102) that generate data signals (112) and write control signals (118) that connect over some distance to CAM core circuits (104). CAM core circuits (104) may include bitline write driver circuits (106), a write control circuit (108), and CAM cells (110). Write control signals (118) may include a signal surrounded by its complements and be positioned such that a routing of the write control signal is as long as the longest of the data signals (112).
Claims20
A circuit, comprising:
- a plurality of data signal lines coupled to a plurality of memory cells;
- a write control signal line that carries a write control signal that is routed essentially along side the data signal lines;
- and
- a write circuit that transfers data on the data signals lines into the memory cells that is enabled in response to the write control signal.
A circuit, comprising:
- a delayed write command signal line that transmits a delayed write command signal for controlling the writing of data to a plurality of memory cells;
- and
- at least one complementary delayed write command signal line adjacent to the delayed write command signal line that transmits a complement of the delayed write command signal.
A method, comprising the steps of:
- delaying a clocked write control signal with respect to clocked data signals with at least capacitive coupling by activating a complementary clocked write control signal on at least one signal line adjacent to the clocked write control signal;
- and
- writing predetermined data values into memory cells based on the clocked data signals in response to the delayed clocked write control signal.
Dependencies are inferred from the claim text.