Bandgap reference circuit
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorCheng-Hsiung Kuo
Life of this patent
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Abstract
This invention provides a circuit and a method for generating a bandgap reference voltage for integrated circuits. This invention relates to providing bandgap reference voltage which is temperature, process and power supply independent. In addition, this invention provides the ability to generate lower reference voltages which are compatible with the advances in integrated circuits. This invention utilizes the addition of additional resistance in the two differential input paths to provide a higher differential FET input gate voltage which will exceed the FET threshold voltage sufficiently to exceed and work with the Vbe voltages of the PN diodes which are implemented using bipolar junction transistors.
Claims30
A bandgap reference circuit comprising:
- a differential amplifier whose two inputs are compared to produce a difference signal and whose output is fed back to two input resistors of different values;
- a first input bias resistor, one end of which is connected to a first differential input, the other end of which is connected to a P-side of a first diode, whose N-side is connected to ground;
- a second input bias resistor, one end of which is connected to a second differential input, the other end of which is connected to a third input bias resistor, wherein said second input bias resistor is used to raise the voltage level of said first differential input;
- wherein said third input bias resistor, one end of which is connected to said second input bias resistor and whose other end is connected to a P-side of a second diode or multiple diodes whose N-side is connected to ground;
- a first differential input path which contains said first input bias resistance connected to said first differential input;
- a second differential input path which contains said second input bias resistance connected to said second differential input;
- a path parallel to said first differential input path which contains a capacitor connected between said first differential input and ground,
- a first feedback path from the differential output to a first feedback resistor whose other side is connected to said first differential input,
- a second feedback path from the differential output to a second feedback resistor whose other side is connected to said second differential input, and
- a differential output node which is driven by an MOS FET.
A method of building a bandgap reference circuit comprising the steps of:
- including a differential amplifier whose two inputs are compared to produce a difference signal and whose output is fed back to two input resistors of different values;
- including a first input bias resistor, one end of which is connected to a first differential input, the other end of which is connected to a P-side of a first diode, whose N-side is connected to ground;
- including a second input bias resistor, one end of which is connected to a second differential input, the other end of which is connected to a third input bias resistor, wherein said second input bias resistor is used to raise the voltage level of said first differential input;
- wherein said third input bias resistor, one end of which is connected to said second input bias resistor and whose other end is connected to a P-side of a second diode or multiple diodes whose N-side is connected to ground;
- including a first differential input path which contains said first input bias resistance connected to said first differential input;
- including a second differential input path which contains said second input bias resistance connected to said second differential input;
- including a path parallel to said first differential input path which contains a capacitor connected between said first differential input and ground,
- including a first feedback path from the differential output to a first feedback resistor whose other side is connected to said first differential input,
- including a second feedback path from the differential output to a second feedback resistor whose other side is connected to said second differential input, and
- including a differential output node which is driven by an MOS FET.
Dependencies are inferred from the claim text.