Data read-out circuit, data read-out method, and data storage device
AssigneeFujitsu Limited
InventorsAkira Yamamoto, Shoichiro Kawashima
Life of this patent
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AssigneeFujitsu Limited
InventorsAkira Yamamoto, Shoichiro Kawashima
Estimating the term…
The present invention provides a data storage device that has high reliability and less power consumption, and a data read-out circuit and a data read-out method employed in the data storage device. This data storage device of the present invention includes a bit line and a memory cell (a ferroelectric capacitor) connected to the bit line. This data storage device characteristically further includes: a capacitor that accumulates electric charge supplied; a negative voltage generating circuit, a p-channel MOS transistor T2, a Vth generating circuit 11, and a feedback circuit 13 that transfer electric charge outputted onto the bit line BL at the time of data read-out to the capacitor; and a sense amplifier circuit 5 that amplifies a voltage generated by the electric charge accumulated by the capacitor, so as to read out the data from the memory cell.
A data storage comprising:
Dependencies are inferred from the claim text.