High voltage charge pump circuit
AssigneeImpinj, Inc.
InventorTroy Gilliland
Life of this patent
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Abstract
A switch element of a charge pump circuit includes (1) an NMOS transistor controlled by a first clock signal coupled between a first node and a first fixed voltage level, (2) a first PMOS well transistor controlled by a second clock signal coupled between the first node and a voltage output node, and (3) a second PMOS well transistor controlled by the first node and coupled between a voltage input node and the voltage output node. The wells of both the first and second PMOS well transistors are coupled to the voltage output node to provide reverse isolation.
Claims32
A switching element for use in a charge pump circuit, the element comprising:
- an input voltage node;
- an output voltage node;
- a ground node;
- a first transistor having a gate, source and drain, the source and drain coupling a first circuit node and said ground node;
- the gate of said first transistor coupled to a source of a first pumping signal;
- a second transistor having a gate, source and drain, the source and drain coupling said input voltage node to said output voltage node;
- the gate of said second transistor coupled to said first circuit node;
- a third transistor having a gate, source and drain, the source and drain coupling the first circuit node to said output voltage node;
- and
- the gate of said third transistor coupled to a source of a second pumping signal.
A switching element for use in a charge pump circuit, the element comprising:
- an input voltage node;
- an output voltage node;
- a ground node;
- a NMOS transistor having a gate, source and drain, the source and drain coupling a first circuit node and said ground node;
- the gate of said NMOS transistor coupled to a source of a first pumping signal;
- a first PMOS well transistor having a gate, source and drain, the source and drain coupling said input voltage node to said output voltage node;
- the gate of said first PMOS well transistor coupled to said first circuit node;
- a second PMOS well transistor having a gate, source and drain, the source and drain coupling the first circuit node to said output voltage node;
- and
- the gate of said second PMOS well transistor coupled to a source of a second pumping signal.
A charge pump circuit, comprising:
- a semiconductor substrate;
- a first voltage input node;
- a second voltage input node;
- a source of a first pumping signal;
- a source of a second pumping signal;
- a source of a plurality of oneshot signals;
- a plurality of switching elements, each of said plurality of switching elements including
- an input voltage node coupled to said first voltage input node;
- an output voltage node coupled to a capacitor;
- a ground node coupled to said second voltage input node;
- a first transistor having a gate, source and drain, the source and drain coupling a first circuit node and said ground node, the gate of said first transistor coupled to a source of a first pumping signal;
- a second transistor having a gate, source and drain, the source and drain coupling said input voltage node to said output voltage node, the gate of said second transistor coupled to said first circuit node;
- and
- a third transistor having a gate, source and drain, the source and drain coupling the first circuit node to said output voltage node, the gate of said third transistor coupled to a source of a second pumping signal.
A method of implementing a stage of a charge pump, comprising:
- closing a switch coupled between a first voltage input node held at a first voltage level and a first circuit node;
- closing a first PMOS well transistor having its well coupled to its drain, its source coupled to a second voltage input node held at a second voltage level, its drain coupled to a second circuit node and its gate coupled to said first circuit node;
- charging a capacitor coupled between a third circuit node and said second circuit node until a potential at said second circuit node is equal to a potential of said second voltage input node;
- opening said switch;
- momentarily closing a second PMOS well transistor having its well coupled to its drain, its source coupled to said first circuit node and its drain coupled to said second circuit node;
- opening said first PMOS well transistor to isolate said second circuit node from said second voltage input node;
- and
- applying a signal to said third circuit node to raise the voltage at said second circuit node to a third voltage level higher than said second voltage level.
A method of implementing a stage of a charge pump, comprising:
- closing a first switch coupled between a first voltage input node held at a first voltage level and a first circuit node;
- closing a second switch having a first side coupled to a second voltage input node held at a second voltage level and second side coupled to a second circuit node, the switch controlled by said first circuit node;
- charging a capacitor coupled between a third circuit node and said second circuit node until a potential at said second circuit node is equal to a potential of said second voltage input node;
- opening said first switch;
- momentarily closing a third switch having a first side coupled to said first circuit node and a second side coupled to said second circuit node;
- opening said second switch to isolate said second circuit node from said second voltage input node;
- and
- applying a signal to said third circuit node to raise the voltage at said second circuit node to a third voltage level higher than said second voltage level.
Dependencies are inferred from the claim text.