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US 6,661,277 B2Granted
Enhanced conductivity body biased PMOS driver
AssigneeIntel Corporation
InventorSanjay Dabral
Life of this patent
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Abstract
According to one embodiment of the present invention a method for biasing a body of a transistor. The method includes detecting a voltage applied to a terminal of a transistor and coupling a biasing voltage to the body based upon the detected voltage.
Claims3
A method for biasing a body of a transistor, the method comprising:
- detecting a voltage applied to a gate terminal of the transistor;
- and
- coupling a biasing voltage to the body based upon the detected voltage, a single source voltage being used to detect the voltage applied to the gate terminal of the transistor and to operate the transistor, wherein coupling the biasing voltage further comprises, if the gate terminal of the transistor is driven high, applying to the body substantially the voltage applied to the source terminal of the transistor.
A method for biasing a body of a transistor, the method comprising:
- detecting a voltage applied to a gate terminal of the transistor;
- and
- coupling a biasing voltage to the body based upon the detected voltage, a single source voltage being used to detect the voltage applied to the gate terminal of the transistor and to operate the transistor, wherein coupling the biasing voltage further comprises, if the gate terminal of the transistor is driven high, applying to the body substantially the voltage applied to the source terminal of the transistor, wherein coupling the biasing voltage further comprises, if the gate terminal of the transistor is driven low, applying a first voltage lower than the voltage applied to the source terminal of the transistor.
Dependencies are inferred from the claim text.