Leading edge modulator for post regulation of multiple output voltage power supplies

A multiple output voltage power supply comprising:

• a transformer having a primary winding and a plurality of secondary windings, said primary winding adapted to have an input voltage coupled thereto;
• a primary side switch coupled to said primary winding and adapted to control power applied to said transformer in accordance with a desired power cycle;
• a plurality of output circuits coupled to respective ones of said plurality of secondary windings and providing respective output voltages, said plurality of output circuits each further comprising a forward rectifier adapted to rectify said power during a positive portion of said power cycle and a free-wheeling rectifier adapted to rectify said power during a negative portion of said power cycle, at least one of said plurality of output circuits further comprising a bypass switch adapted to interrupt operation of said forward rectifier;
• and
• a post regulation circuit controlling operation of said bypass switch, said post regulation circuit further comprising:
• a signal generator adapted to receive a synchronization signal corresponding to said power cycle, said signal generator generating a sawtooth waveform that rises during a positive portion of the synchronization signal and falls during a zero portion of the synchronization signal;
• a Schmidt trigger having an enabled state when a leading edge of said sawtooth waveform reaches a threshold level and a disabled state when said synchronization signal falls to zero;
• and
• a driver generating a drive signal used to control said bypass switch in accordance with said enabled and disabled states of said Schmidt trigger.

A method for regulating a multiple output voltage power supply comprising a plurality of output circuits with at least one output circuit including a current bypass switch, the method comprising the steps of:

• receiving a synchronization signal corresponding to a power cycle applied to said at least one output circuit;
• generating a sawtooth waveform that rises during a positive portion of the synchronization signal and falls during a zero portion of the synchronization signal;
• generating an enabling signal that begins when a leading edge of said sawtooth waveform reaches a threshold level and ends when said synchronization signal falls to zero;
• and
• controlling said bypass switch in accordance with said enabling signal.