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US 6,661,082 B1Granted
Flip chip substrate design
AssigneeFairchild Semiconductor Corporation
InventorsHonorio T. Granada, Rajeev Joshi, Connie Tangpuz
Life of this patent
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Abstract
A chip device that includes a leadframe that has a die attach cavity. The memory device further includes a die that is placed within the die attach cavity. The die attach cavity is substantially the same thickness as the die. The die is positioned within the cavity and is attached therein with a standard die attachment procedure.
Claims8
A discrete power chip device comprising:
- a. a die including a plurality of solder balls thereon that serve as source and gate connections;
- and
- b. a conductive leadframe including a die attach cavity, the die attach cavity having substantially the same thickness as the die;
- wherein the die is positioned within the die attach cavity and is attached thereon such that the die is coplanar with a top surface of the leadframe;
- wherein a plurality of solder balls are placed on the top surface around the entire periphery of the leadframe that serve as drain connections;
- and
- wherein the device has improved thermal resistance and reduced electrical path resistance.
4 more elements
A discrete power chip device comprising:
- a. a bumped die, wherein the solder bumps serve as gate and source connections;
- b. a conductive leadframe including a die attach cavity and a plurality of dimples defined around the entire periphery of the leadframe within a top surface of the leadframe, the die attach cavity having substantially the same thickness as the die;
- and
- c. a plurality of solder balls placed within the dimples that serve as drain connections;
- wherein the die is positioned within the cavity and is attached thereon such that the die is coplanar with the top surface of the leadfame;
- and
- wherein the device has improved thermal resistance and reduced electrical path resistance.
4 more elements
Dependencies are inferred from the claim text.