Thin film transistor substrate

A TFT substrate, comprising:

• a gate electrode, a gate pad and a gate line which form a metal film pattern, wherein a width of the metal film pattern becomes narrower from a bottom of the metal film pattern;
• an insulating layer pattern formed over the gate electrode and exposing a portion of the gate pad;
• a semiconductor film pattern formed over the insulating layer pattern and over the gate electrode;
• an impurity doped semiconductor film pattern formed on the semiconductor film pattern, wherein the impurity doped semiconductor film pattern contacts a top surface of the semiconductor film pattern formed over the gate electrode;
• a source electrode, a drain electrode and a data line formed over a portion of the impurity doped semiconductor film pattern;
• a protection film pattern formed over the source electrode and the drain electrode and over the insulating layer pattern in an area of the gate pad, the protection film pattern having a contact hole over the drain electrode and exposing a top surface of the gate pad;
• a first pixel electrode pattern electrically connected to the drain electrode on the protection film pattern;
• and
• a second pixel electrode pattern electrically connected to the exposed area of the gate pad.