Method for manufacturing CMOS device having low gate resistivity using aluminum implant
AssigneeAdvanced Micro Devices, Inc.
InventorMatthew Buynoski
Life of this patent
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Abstract
A CMOS device (10) having p-channel and n-channel transistors with aluminum implanted gates (20). When making the device (10), aluminum is non-selectively implanted to form a source and drain for the n-channel transistor and to reduce the resistivity of the gates (20). The aluminum diffuses through an upper polysilicon layer (22) of the gate, thereby reducing its resistivity, but does not diffuse through a lower oxide layer (24) of the gate, thereby preventing penetration problems. Thereafter, a compensating implant (e.g., phosphorus or arsenic) is selectively implanted to overcompensate the boron previously implanted in the p-type tub.
Claims13
A method of making a CMOS device having a p-channel transistor and an n-channel transistor, said method comprising the steps of:
- providing a substrate having an n-type tub in which the p-channel transistor is to be formed and a p-type tub in which the n-channel transistor is to be formed;
- forming a transistor gate disposed over each tub and each gate including an upper polysilicon level and a lower oxide level;
- and
- non-selectively implanting aluminum into:
- both of the tubs, the aluminum providing dopant species for a source region and a drain region of the p-channel transistor and being present in a source region and a drain region of the n-channel transistor;
- and
- both of the upper polysilicon levels of the gates to reduce the resistivity of the upper polysilicon levels of each of the gates.
Dependencies are inferred from the claim text.