Method for fabricating metal gates in deep sub-micron devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSheng-Hsiung Chen, Ming-Hsing Tsai
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Abstract
A method for fabricating metal gates in deep sub-micron CMOS devices. The method blanket deposits a transition metal nitride layer on top of a gate dielectric layer for forming gate electrodes for both a PMOS and an NMOS device. After a cap layer is deposited on top of the gate electrode for PMOS, a rapid thermal annealing process is carried out to drive out nitrogen from the transition metal nitride on top of the NMOS. Gate electrodes having different work functions on top of the PMOS and NMOS are thus achieved simultaneously by the same fabrication process.
Claims13
A method for fabricating metal gates in deep sub-micron CMOS devices comprising the steps of:
- providing a pre-processed silicon substrate having an active area on a top surface, said active area comprises a PMOS and an NMOS;
- depositing a gate dielectric layer on said active area of the silicon substrate;
- blanket depositing a transition metal nitride on said top surface of the substrate;
- patterning said transition metal nitride to cover said gate dielectric layer only;
- depositing and patterning a cap layer on top of said PMOS;
- annealing said substrate by a rapid thermal process (RTP) at a temperature between about 300° C. and about 700° C., whereby nitrogen evaporates away from said transition metal nitride that is not shielded by said cap layer such that only a transition metal covers said NMOS;
- and
- removing said cap layer from top of said PMOS.
Dependencies are inferred from the claim text.