Low loss high Q inductor
AssigneeMicron Technology, Inc.
InventorsKie Y. Ahn, Leonard Forbes
Life of this patent
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Abstract
A high Q inductive element with low losses, high inductance and high efficiency is disclosed. The high Q inductive element with one or more inductive loops is formed over a silicon micro structure with thin support elements formed by deep plasma etching in bulk silicon. The support elements, which may have different configurations, such as walls or columns, provide mechanical stability to the inductive loops and reduce the parasitic capacitance and the losses to the substrate.
Claims19
A method of forming an inductive element, said method comprising the steps of:
- forming at least one semiconductor support element in a cavity structure, said at least one semiconductor support element having a top surface;
- forming an insulating layer over said top surface;
- and
- forming a conductive element over said insulating layer, said conductive element being supported by said semiconductor support element.
A method of forming an inductive element, said method comprising the steps of:
- forming at least one semiconductor support element in a cavity structure by etching a semiconductor substrate, said at least one semiconductor support element having a top surface;
- forming an insulating layer over said top surface;
- and
- forming a conductive element over said insulating layer, said conductive element being supported by said semiconductor support element.
A method of forming an inductive element, said method comprising the steps of:
- forming at least one semiconductor support element in a cavity structure by etching said semiconductor substrate by using deep plasma etching, said at least one semiconductor support element having a top surface;
- forming an insulating layer over said top surface;
- and
- forming a conductive element over said insulating layer, said conductive element being supported by said semiconductor support element.
A method of forming an inductive element, said method comprising the steps of:
- etching a forming at least one semiconductor support element in a cavity structure by semiconductor substrate, wherein said at least one semiconductor support element is etched to about 209 microns, said at least one semiconductor support element having a top surface;
- forming an insulating layer over said top surface;
- and
- forming a conductive element over said insulating layer, said conductive element being supported by said semiconductor support element.
A method of forming an inductive element, said method comprising the steps of:
- forming a plurality of semiconductor walls which extend radially from a center portion of a cavity structure, each of said semiconductor walls having a top surface;
- forming an insulating layer over said top surface;
- and
- forming a conductive element over said insulating layer, said conductive element being supported by said semiconductor walls.
A method of forming an inductive element, said method comprising the steps of:
- forming at least one semiconductor support element in a cavity structure, said at least one semiconductor support element having a top surface;
- forming an insulating layer over said top surface;
- and
- forming a conductive element over said insulating layer, said conductive element being supported by said semiconductor support element;
- and
- locating resist in said cavity structure, between said semiconductor support element and a semiconductor substrate.
A method of forming an inductive element, said method comprising the steps of:
- forming at least one semiconductor support element in a cavity structure, said at least one semiconductor support element having a top surface;
- forming an insulating layer over said top surface;
- forming a barrier layer over said insulating layer;
- and
- forming a conductive element over said barrier layer, said conductive element being supported by said semiconductor support element.
A method of forming an inductive element, said method comprising the steps of:
- forming at least one semiconductor support element in a cavity structure, said at least one semiconductor support element having a top surface;
- forming an insulating layer over said top surface;
- forming a barrier layer over said insulating layer, wherein said barrier layer is formed of a material selected from the group consisting of titanium, titanium nitride, titanium tungsten, and chromium;
- and
- forming a conductive element over said barrier layer, said conductive element being supported by said semiconductor support element.
Dependencies are inferred from the claim text.