Passivation structure for flash memory and method for fabricating same
AssigneeMacronix International Co., Ltd.
InventorsJung-Chieh Chen, Tung-Ta Lee, I-Yueh Chen, Chen-Chien Lu
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Abstract
A passivation structure for a semiconductor device includes a high ultraviolet transmittance silicon nitride (UV-SiN) layer. This UV-SiN layer substantially conformally overlies a plurality of top metal lines, which are formed over a semiconductor substrate, such that topographical hollows are defined between adjacent top metal lines. A spin-on glass (SOG) material fills in the topographical hollows. A silicon oxynitride (SiON) layer having a thickness in a range from about 8,000 angstroms to about 10,000 angstroms overlies the UV-SiN layer and the SOG material. A method for forming the passivation structure also is described.
Claims6
A passivation structure for a semiconductor device, comprising:
- a plurality of top metal lines overlying a substrate;
- a high ultraviolet transmittance silicon nitride layer substantially conformally overlying the plurality of top metal lines such that portions of a top surface of the high ultraviolet transmittance silicon nitride layer define a plurality of topographical hollows between adjacent top metal lines;
- a spin-on glass material overlying the portions of the high ultraviolet transmittance silicon nitride layer that define the plurality of topographical hollows;
- and
- a silicon oxynitride layer overlying the high ultraviolet transmittance silicon nitride layer and the spin-on glass material.
Dependencies are inferred from the claim text.