System and method for insertion of prefetch instructions by a compiler
AssigneeSun Microsystems, Inc.
InventorsPeter C. Damron, Nicolai Kosche
Life of this patent
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AssigneeSun Microsystems, Inc.
InventorsPeter C. Damron, Nicolai Kosche
Estimating the term…
The present invention discloses a method and device for placing prefetch instruction in a low-level or assembly code instruction stream. It involves the use of a new concept called a martyr memory operation. When inserting prefetch instructions in a code stream, some instructions will still miss the cache because in some circumstances a prefetch cannot be added at all, or cannot be added early enough to allow the needed reference to be in cache before being referenced by an executing instruction. A subset of these instructions are identified using a new method and designated as martyr memory operations. Once identified, other memory operations that would also have been cache misses can “hide” behind the martyr memory operation and complete their prefetches while the processor, of necessity, waits for the martyr memory operation instruction to complete. This will increase the number of cache hits.
In a compilation system, a method for scheduling prefetch instructions and memory operation instructions in a code file having a plurality of instructions comprising:
A program storage device readable by a machine, tangibly embodying a program of instructions executable by a machine to perform a method for scheduling prefetch instructions and memory operation instructions in a code file having a plurality of instructions, the memory comprising:
A prefetch and memory instruction scheduler apparatus, in a computer system, for use in compiling a program, said apparatus comprising:
A method of inserting prefetch instructions during compilation of a computer program, the method comprising:
A system for inserting prefetch instructions during compilation of a computer program, the system comprising:
Dependencies are inferred from the claim text.