System and method for H-Tree clocking layout

A method for routing a clocking signal in an integrated circuit having a plurality of circuit blocks separated by channels, the method comprising the steps of:

• dividing the circuit blocks into a plurality of circuit block groups, each circuit block group covering a contiguous region of the integrated circuit;
• determining a center point of each of said circuit block groups based upon center of mass;
• determining whether any of said center points lies within a circuit block and, if so, moving the determined center point to a closest channel thereto;
• calculating distances horizontally and vertically between said center points, and selecting pairings of the center points based upon the least difference between the calculated distances;
• routing a pair of clocking wires between the center points within each of the selected pairs of center points;
• determining a wire center point of each of said pair of clocking wires;
• routing a main clocking wire to the wire center point of each of said pair of clocking wires;
• and
• for each of said circuit block groups, routing clocking wires from the center point of the circuit block group to the circuit blocks of the circuit block group.

A processing system comprising a computer readable medium storing instructions which, when executed by the processing system, cause the processing system to perform a method of routing a clock signal wiring in an integrated circuit having plurality of circuit blocks, the method comprising the steps of:

• dividing the circuit blocks into a plurality of circuit block groups;
• determining a center point of each of said circuit block groups based upon center of mass;
• routing a wire from an input point through a channel running among said circuit block groups;
• successively branching said wire into multiple wire branches, such that wire lengths at corresponding branch levels of different branches are approximately equal;
• and
• routing said wire branches to said circuit block groups.

A processing system comprising a computer readable medium storing instructions which, when executed by the processing system, cause the processing system to perform a method of routing a clock signal wiring in an integrated circuit having a plurality of circuit blocks separated by channels, the method comprising the steps of:

• dividing the circuit blocks into a plurality of circuit block groups, each circuit block group covering a contiguous region of the integrated circuit;
• determining a center point of each of said circuit block groups based upon center of mass;
• determining whether any of said center points lies within a circuit block and, if so, moving the determined center point to a closest channel thereto;
• calculating distances horizontally and vertically between said center points, and selecting pairings of the center points based upon the least difference between the calculated distances;
• routing a pair of clocking wires between the center points within each of the selected pairs of center points;
• determining a wire center point of each of said pair of clocking wires;
• routing a main clocking wire to the wire center point of each of said pair of clocking wires;
• and
• for each of said circuit block groups, routing clocking wires from the center point of the circuit block group to the circuit blocks of the circuit block group.