Method of optimizing signal lines within circuit, optimizing apparatus, recording medium having stored therein optimizing program, and method of designing circuit and recording medium having stored therein program for designing circuit

A method of optimizing signal distribution through signal lines which connect a signal supplying source to a plurality of elements which are supplied with a signal from the signal supplying source through the signal lines, the method being utilized when designing a circuit including the signal supplying source and the plurality of elements, the method of optimizing the signal lines within the circuit comprising:

• determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source;
• dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when it is determined that the signal supplying source does not satisfy the fan-out restriction;
• and
• inserting, into each of the divided groups, a buffer element having a size which makes the groups of elements satisfy the fan-out restriction;
• wherein
• the inserted buffer element is regarded as a driven element, and then it is again determined whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the dividing and the inserting are repeatedly carried out until the determining delivers a determination that the signal supplying source satisfies the fan-out restriction, where
• if the determining delivers a determination that the signal supplying source satisfies the fan-out restriction, then an optimization is executed in such a manner that a delay taken place between the signal supplying source and each of the plurality of elements is analyzed, and the signal distribution through the signal lines is optimized by inserting or removing one or more buffer elements, or by changing the buffer size, or by changing the group to which the driven element belongs, and where
• if the determining delivers a determination that the signal supplying source does not satisfy the fan-out restriction, then an evaluation calculation is carried out in such a manner that an evaluation value is calculated for each of the all pairs of the driven elements on the basis of a circuit performance enhancing factor, and
• the driven elements are divided into groups in the dividing so that, of pairs satisfying the fan-out restriction, a pair having the largest evaluation value calculated at the evaluation calculation is made to belong to the same group with priority.

A method of optimizing signal distribution through signal lines which connect a signal supplying source to a plurality of elements which are supplied with a signal from the signal supplying source through the signal lines, the method being utilized when designing a circuit including the signal supplying source and the plurality of elements, the method of optimizing the signal lines within the circuit comprising:

• determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source;
• dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when it is determined that the signal supplying source does not satisfy the fan-out restriction;
• and
• inserting, into each of the divided groups, a buffer element having a size which makes the groups of elements satisfy the fan-out restriction;
• wherein
• the inserted buffer element is regarded as a driven element, and then it is again determined whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the dividing and the inserting are repeatedly carried out until the determining delivers a determination that the signal supplying source satisfies the fan-out restriction, where a buffer stage number adjustment inserts one or more buffer elements into the circuit so that each circuit path extending from the signal supplying source to all of the plurality of elements consists of the same number of cell stages.

A method of optimizing signal distribution through signal lines which connect a signal supplying source to a plurality of elements which are supplied with a signal from the signal supplying source through the signal lines, the method being utilized when designing a circuit including the signal supplying source and the plurality of elements, the method of optimizing the signal lines within the circuit comprising:

• determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source;
• dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when it is determined that the signal supplying source does not satisfy the fan-out restriction;
• and
• inserting, into each of the divided groups, a buffer element having a size which makes the groups of elements satisfy the fan-out restriction;
• wherein
• the inserted buffer element is regarded as a driven element, and then it is again determined whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the dividing and the inserting are repeatedly carried out until the determining delivers a determination that the signal supplying source satisfies the fan-out restriction, where
• if the determining delivers a determination that the signal supplying source satisfies the fan-out restriction, then an optimization is executed in such a manner that a delay taken place between the signal supplying source and each of the plurality of elements is analyzed, and the signal distribution through the signal lines is optimized by inserting or removing one or more buffer elements, or by changing the buffer size, or by changing the group to which the driven element belongs, and where
• a buffer stage adjustment inserts one or more buffer elements into the circuit so that each circuit path extending from the signal supplying source to all of the plurality of elements consists of the same number of cell stages.

An apparatus for optimizing signal distribution through signal lines which connect a signal supplying source and a plurality of elements which are supplied with a signal from the signal supplying source through the signal lines, the apparatus being utilized when designing a circuit including the signal supplying source and the plurality of elements, the apparatus for optimizing the signal lines within the circuit comprising:

• a determining unit determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source;
• a dividing unit dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when the determining unit determines that the signal supplying source does not satisfy the fan-out restriction;
• a buffer inserting unit inserting a buffer element having a size which makes the groups of elements satisfy the fan-out restriction, into each of the groups divided by the dividing unit;
• wherein
• the determining unit regards the buffer element inserted by the buffer inserting unit as a driven element and determines whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the sign al supplying source, and
• the dividing unit and the buffer inserting unit repeat the processing thereof until the determining unit delivers a determination that the signal supplying source satisfies the fan-out restriction;
• and
• an evaluation value calculating unit carrying out calculation in such a manner that, if the determining unit delivers a determination that the signal supplying source does not satisfy the fan-out restriction, then the evaluation value calculating unit calculates an evaluation value for each of the all pairs of the driven elements on the basis of a circuit performance enhancing factor, wherein
• the dividing unit divides the driven elements into groups so that, of pairs satisfying the fan-out restriction, a pair having the largest evaluation value calculated by the evaluation value calculating unit is made to belong to the same group with priority.

An apparatus for optimizing signal distribution through signal lines which connect a signal supplying source and a plurality of elements which are supplied with a signal from the signal supplying source through the signal lines, the apparatus being utilized when designing a circuit including the signal supplying source and the plurality of elements, the apparatus for optimizing the signal lines within the circuit comprising:

• a determining unit determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source;
• a dividing unit dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when the determining unit determines that the signal supplying source does not satisfy the fan-out restriction;
• a buffer inserting unit inserting a buffer element having a size which makes the groups of elements satisfy the fan-out, restriction, into each of the groups divided by the dividing unit;
• wherein
• the determining unit regards the buffer element inserted by the buffer inserting unit as a driven element and determines whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the dividing unit and the buffer inserting unit repeat the processing thereof until the determining unit delivers a determination that the signal supplying source satisfies the fan-out restriction;
• an optimizing unit carrying out optimization in such a manner that, if the determining unit delivers a determination that the signal supplying source satisfies the fan-out restriction, then the optimizing unit analyzes a delay taken place between the signal supplying source and each of the plurality of elements, and optimizes the signal distribution through the signal lines by inserting or removing one or more buffer elements, or by changing the buffer size, or by changing the group to which the driven element belongs;
• and
• an evaluation value calculating unit carrying out calculation in such a manner that, if the determining unit delivers a determination that the signal supplying source does not satisfy the fan-out restriction, then the evaluation value calculating unit calculates an evaluation value for each of the all pairs of the driven elements on the basis of a circuit performance enhancing factor, wherein
• the dividing unit divides the driven elements into groups so that, of pairs satisfying the fan-out restriction, a pair having the largest evaluation value calculated by the evaluation value calculating unit is made to belong to the same group with priority.

An apparatus for optimizing signal distribution through signal lines which connect a signal supplying source and a plurality of elements which are supplied with a signal from the signal supplying source through the signal lines, the apparatus being utilized when designing a circuit including the signal supplying source and the plurality of elements, the apparatus for optimizing the signal lines within the circuit comprising:

• a determining unit determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source;
• a dividing unit dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when the determining unit determines that the signal supplying source does not satisfy the fan-out restriction;
• a buffer inserting unit inserting a buffer element having a size which makes the groups of elements satisfy the fan-out restriction, into each of the groups divided by the dividing unit;
• wherein
• the determining unit regards the buffer element inserted by the buffer inserting unit as a driven element and determines whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the dividing unit and the buffer inserting unit repeat the processing thereof until the determining unit delivers a determination that the signal supplying source satisfies the fan-out restriction;
• and
• a buffer stage number adjusting unit inserting one or more buffer elements into the circuit so that each circuit path extending from the signal supplying source to all of the plurality of elements consists of the same number of cell stages.

An apparatus for optimizing signal distribution through signal lines which connect a signal supplying source and a plurality of elements which are supplied with a signal from the signal supplying source through the signal lines, the apparatus being utilized when designing a circuit including the signal supplying source and the plurality of elements, the apparatus for optimizing the signal lines within the circuit, comprising:

• a determining unit determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source;
• a dividing unit dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when the determining unit determines that the signal supplying source does not satisfy the fan-out restriction;
• a buffer inserting unit inserting a buffer element having a size which makes the groups of elements satisfy the fan-out restriction, into each of the groups divided by the dividing unit;
• wherein
• the determining unit regards the buffer element inserted by the buffer inserting unit as a driven element and determines whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the dividing unit and the buffer inserting unit repeat the processing thereof until the determining unit delivers a determination that the signal supplying source satisfies the fan-out restriction;
• an optimizing unit carrying out optimization in such a manner that, if the determining unit delivers a determination that the signal supplying source satisfies the fan-out restriction, then the optimizing unit analyzes a delay taken place between the signal supplying source and each of the plurality of elements, and optimizes the signal distribution through the signal lines by inserting or removing one or more buffer elements, or by changing the buffer size, or by changing the group to which the driven element belongs;
• and
• a buffer stage number adjusting unit inserting one or more buffer elements into the circuit so that each circuit path extending from the signal supplying source to all of the plurality of elements consists of the same number of cell stages.

A recording medium having an optimizing program stored therein, the program being utilized when designing a circuit including a signal supplying source and a plurality of elements which are supplied with a signal from the signal supplying source through signal lines, the program being executed by a computer optimizing signal distribution through the signal lines connecting the signal supplying source to each of the plurality of elements,

• the optimizing program comprising the procedures of:
• a procedure of determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source a procedure of dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when it is determined in the determining procedure that the signal supplying source does not satisfy the fan-out restriction;
• and
• a procedure of inserting a buffer element having a size which makes the groups of elements satisfy the fan-out restriction, into each of the groups divided at the dividing procedure;
• wherein
• the buffer element inserted at the buffer inserting procedure is regarded as a driven element, and then it is again determined in the determining procedure whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the computer repeatedly carries out the dividing procedure and the buffer inserting procedure until the determining procedure delivers a determination that the signal supplying source satisfies the fan-out restriction, wherein
• the optimizing program causes the computer to execute procedures in such a manner that
• if the determining procedure delivers a determination that the signal supplying source does not satisfy the fan-out restriction, then an evaluation value calculating procedure is executed for each of the all pairs of the driven elements on the basis of a circuit performance enhancing factor, and the driven elements are divided into groups in the dividing procedure so that, of pairs satisfying the fan-out restriction, a pair having the largest evaluation value calculated at the evaluation value calculating procedure is made to belong to the same group with priority.

A recording medium having an optimizing program stored therein, the program being utilized when designing a circuit including a signal supplying source and a plurality of elements which are supplied with a signal from the signal supplying source through signal lines, the program being executed by a computer optimizing signal distribution through the signal lines connecting the signal supplying source to each of the plurality of elements,

• the optimizing program comprising the procedures of:
• a procedure of determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source a procedure of dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when it is determined in the determining, procedure that the signal supplying source does not satisfy the fan-out restriction;
• and
• a procedure of inserting a buffer element having a size which makes the groups of elements satisfy the fan-out restriction, into each of the groups divided at the dividing procedure;
• wherein
• the buffer element inserted at the buffer inserting procedure is regarded as a driven element, and then it is again determined in the determining procedure whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the computer repeatedly carries out the dividing procedure and the buffer inserting procedure until the determining procedure delivers a determination that the signal supplying source satisfies the fan-out restriction, wherein
• the optimizing program causes the computer to execute an optimizing procedure in such a manner that, if the determining procedure delivers a determination that the signal supplying source satisfies the fan-out restriction, then a delay taken place between the signal supplying source and each of the plurality of elements is analyzed, and the signal distribution through the signal lines is optimized by inserting or removing one or more buffer elements, or by changing the buffer size, or by changing the group to which the driven element belongs, and wherein
• the optimizing program causes the computer to execute procedures in such a manner that if the determining procedure delivers a determination that the signal supplying source does not satisfy the fan-out restriction, then an evaluation value calculating procedure is executed for each of the all pairs of the driven elements on the basis of a circuit performance improving factor, and the driven elements are divided into groups in the dividing procedure so that, of pairs satisfying the fan-out restriction, a pair having the largest evaluation value calculated at the evaluation value calculating procedure is made to belong to the same group with priority.

A recording medium having an optimizing program stored therein, the program being utilized when designing a circuit including a signal supplying source and a plurality of elements which are supplied with a signal from the signal supplying source through signal lines, the program being executed by a computer optimizing signal distribution through the signal lines connecting the signal supplying source to each of the plurality of elements,

• the optimizing program comprising the procedures of:
• a procedure of determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source a procedure of dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when it is determined in the determining procedure that the signal supplying source does not satisfy the fan-out restriction;
• and
• a procedure of inserting a buffer element having a size which makes the groups of elements satisfy the fan-out restriction, into each of the groups divided at the dividing procedure;
• wherein
• the buffer element inserted at the buffer inserting procedure is regarded as a driven element, and then it is again determined in the determining procedure whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the computer repeatedly carries out the dividing procedure and the buffer inserting procedure until the determining procedure delivers a determination that the signal supplying source satisfies the fan-out restriction, and wherein
• the optimization program causes the computer to execute a buffer stage number adjusting procedure in which one or more buffer elements are inserted into the circuit so that each circuit path extending from the signal supplying source to all of the elements consists of the same number of cell stages.

A recording medium having an optimizing program stored therein, the program being utilized when designing a circuit including a signal supplying source and a plurality of elements which are supplied with a signal from the signal supplying source through signal lines, the program being executed by a computer optimizing signal distribution through the signal lines connecting the signal supplying source to each of the plurality of elements,

• the optimizing program comprising the procedures of:
• a procedure of determining whether or not the signal supplying source satisfies a fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source a procedure of dividing the plurality of elements into a plural number of groups so that the fan-out restriction is satisfied in each of the groups and that each of the groups has the same or substantially the same load capacity, when it is determined in the determining procedure that the signal supplying source does not satisfy the fan-out restriction;
• and
• a procedure of inserting a buffer element having a size which makes the groups of elements satisfy the fan-out restriction, into each of the groups divided at the dividing procedure;
• wherein
• the buffer element inserted at the buffer inserting procedure is regarded as a driven element, and then it is again determined in the determining procedure whether or not the signal supplying source satisfies the fan-out restriction if the signal supplying source supplies a signal to all of the driven elements which are directly connected to the signal supplying source, and
• the computer repeatedly carries out the dividing procedure and the buffer inserting procedure until the determining procedure delivers a determination that the signal supplying source satisfies the fan-out restriction, wherein
• the optimizing program causes the computer to execute an optimizing procedure in such a manner that, if the determining procedure delivers a determination that the signal supplying source satisfies the fan-out restriction, then a delay taken place between the signal supplying source and each of the plurality of elements is analyzed, and the signal distribution through the signal lines is optimized by inserting or removing one or more buffer elements, or by changing the buffer size, or by changing the group to which the driven element belongs, and wherein
• the optimization program causes the computer to execute a buffer stage number adjusting procedure in which one or more buffer elements are inserted into the circuit so that each circuit path extending from the signal supplying source to all of the elements consists of the same number of cell stages.