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AssigneeHewlett-Packard Development Company, L.P.
InventorsShail Aditya Gupta, B. Ramakrishna Rau, Vinod K. Kathail, Michael S. Schlansker
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A VLIW processor design system automates the design of programmable and non-programmable VLIW processors. The system takes as input an opcode repertoire, the I/O format of the opcodes, a register file specification, and instruction-level parallelism constraints. With this input specification, the system constructs a datapath, including functional units, register files and their interconnect components from a macrocell database. The system uses the input and the datapath to generate an instruction format design. The instruction format may then be used to construct the processor control path. The abstract input and datapath may be used to extract a machine description suitable to re-target a compiler to the processor. To optimize the processor for a particular application program, the system selects custom instruction templates based on operation issue statistics for the application program generated by the re-targeted compiler.
An automated VLIW processor design method comprising:
An automated VLIW processor design method for computing an optimized instruction format specification using an abstract instruction set specification, wherein the abstract instruction set specification provides the opcode repertoire of the processor, the I/O format for operations in the opcode repertoire, the instruction level parallelism constraints on the operations, and the register file specification, the method comprising:
Dependencies are inferred from the claim text.