US 6,651,172 B1 · Multi-phase EEPROM reading for network interface initialization

Abstract

A novel method is provided for initializing a data processing system having registers programmable with configuration data read from a non-volatile memory at power-up. The method includes segmenting the non-volatile memory into a first portion for storing first data, and a second portion for storing second data having lower priority than the first data. The first portion is smaller than the second portion. The first data are read from the first portion to program a first group of registers. Thereafter, the second data are read from the second portion to program a second group of registers. As a result, a host is enabled to access the first group of registers, while the second data are being read from the second memory portion.

Claims16

Dependent claims

A data processing system controlled by a host and having registers programmable with register data read from a non-volatile memory, the data processing system comprising:

at least one first register programmable with first data read from the external memory, the first register being accessible to the host, at least one second register programmable with second data read from the external memory, the second data has higher length than the first data, and
a data reading circuit for performing a multi-phase reading of the register data from the memory to read the first data before reading the second data so as to program said at least one first register before programming said at least one second register.

Dependencies are inferred from the claim text.

Multi-phase EEPROM reading for network interface initialization

Life of this patent

Multi-phase EEPROM reading for network interface initialization

Life of this patent

Abstract

Claims16