Mechanism for extending properties of virtual memory pages by a TLB

A mechanism in a microprocessor for enabling a translation lookaside buffer (TLB) to extend the properties of virtual memory pages, the mechanism comprising:

• an extended properties register array, for specifying a plurality of extended virtual page properties;
• and
• a memory management unit, coupled to said extended properties register array, for accessing the virtual memory pages, said memory management unit comprising:
• TLB entries, for prescribing the properties of the virtual memory pages, wherein an extended memory attributes field within each of said TLB entries designates a corresponding register within said extended properties register array, and wherein said extended memory attributes field specifies legacy virtual page properties according to memory management rules employed by a legacy operating system;
• and
• extended attributes logic, coupled to said TLB entries, for accessing said corresponding register to determine one of said plurality of extended virtual page properties that applies for accesses to a particular virtual memory page,
• wherein said corresponding register is initialized to indicate specific legacy virtual page properties that correspond to contents of said extended memory attributes field according to said memory management rules.

A computer program product for use with a computing device, the computer program product comprising:

• a computer usable medium, having computer readable program code embodied in said medium, for causing a CPU to be described, said CPU being capable of accessing virtual memory pages according to extended page properties, said computer readable program code comprising:
• first program code, for describing a translation lookaside buffer (TLB), said TLB configured to store TLB entries, each having an extended page properties field, wherein said extended page properties field, according to a legacy operating system memory management protocol, prescribes page properties;
• second program code, for describing extended attributes logic, said extended attributes logic configured to employ said extended page properties field to access an extended attribute register that is external to said TLB, wherein contents of said extended attribute register determine said extended page properties for a particular virtual memory page, and wherein said extended attribute register is one of a plurality of extended attribute registers, and wherein said plurality of extended attribute registers is initialized to prescribe said legacy memory attributes according to said extended page properties field;
• and
• third program code, for describing a configuration register, wherein contents of said configuration register indicate whether or not said CPU is capable of providing said extended page properties.

A computer data signal embodied in a transmission medium, comprising:

• first computer-readable program code, for describing a translation lookaside buffer (TLB), said TLB configured to store TLB entries, each having an extended page properties field;
• second computer-readable program code, for describing extended memory attributes registers external to said TLB, wherein each of said extended memory attributes registers prescribes a set of extended attributes for accesses to virtual memory pages;
• third computer-readable program code, for describing extended attributes logic, said extended attributes logic configured to employ said extended page properties field to access one of said extended memory attributes registers to determine a specific set of extended attributes whereby a specific virtual memory page is accessed, wherein said extended page properties field specifies legacy attributes for access to said virtual memory pages according to a legacy memory management protocol;
• and
• fourth computer-readable program code, for describing a configuration register, wherein contents of said configuration register indicate to an operating system that extended attributes features are available for use;
• wherein said extended memory attributes registers are initialized to indicate said legacy attributes according to said legacy memory management protocol, and wherein said one of said extended memory attributes registers is initialized to indicate particular legacy attributes corresponding to contents of said extended page properties field.

A method in a microprocessor for extending the properties of virtual memory pages over that provided for by existing translation lookaside buffer (TLB) entries, the method comprising:

• designating an existing field within each of the entries as an extended properties register index field and providing an array of extended properties registers external to the TLB that are indexed by the extended properties register index field;
• employing contents of the extended properties register index field to access a particular extended properties register within the array to extend the properties of a particular virtual memory page, wherein said employing comprises:
• first prescribing, within a first field of the particular extended properties register, an extended cache control policy for accesses to the particular virtual memory page;
• and
• second prescribing, within a second field of the particular extended properties register, an Instruction Set Architecture to be used for accesses to the particular virtual memory page;
• initializing the array of extended properties registers so that they prescribe legacy properties as prescribed by contents of the extended properties register index field according to a legacy memory management protocol;
• and
• providing a configuration register in the microprocessor to indicate to an operating system that extended virtual page management features are available for employment.