Multiprocessor system
AssigneeFuji Xerox Co., Ltd.
InventorsShinobu Ozeki, Takeshi Kamimura, Kenichi Kobayashi, Kazuhiro Sakai, Tsutomu Hamada, Masao Funada, Hiroshi Fujimagari
Life of this patent
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Abstract
The invention relates to a multiprocessor system having plural processors and an optical bus shared by the plural processors, and intends to simplify the cache control, reduce the volume of hardware, and shorten the memory access processing time. For this purpose, the multiprocessor system of the invention includes a shared memory, a cache memory connected to the shared memory, an optical bus connected to the cache memory, and plural processors connected to the optical bus, which access to the cache memory through the optical bus.
Claims12
A multiprocessor system comprising:
- a shared memory;
- a cache memory connected to the shared memory;
- an optical cross coupling network capable of simultaneously coupling plural processors to a plurality of inputs/outputs to which the cache memory is connected;
- and
- plural processors connected to the optical cross coupling network, which access the cache memory through the optical cross coupling network via the plurality of inputs/outputs.
A multiprocessor system comprising:
- a shared memory;
- a cache memory connected between the shared memory and an optical cross coupling network via a plurality of inputs/outputs;
- and
- plural processors connected to the optical cross coupling network, which access the cache memory through the optical cross coupling network simultaneously via the plurality of inputs/outputs.
Dependencies are inferred from the claim text.