Reduced hardware network adapter and communication

A system, comprising:

• a network interface adapter to couple a client computer with a network, the network interface adapter having
• a physical layer circuitry coupled with a physical link of the network, and
• a reduced hardware media access control (MAC) in communication with the physical layer circuitry, the MAC having
• a transmit buffer to receive data from the client computer and temporarily store the data before transmitting the data to the physical link,
• a receive buffer to receive data from the physical link and temporarily store the data before providing the data to the client computer, and
• a register interface coupled with the transmit and receive buffers, the register interface having a status register including at least one bit signifying an interrupt state in at least one of a read and write operation.

A system, comprising:

• a transmit buffer coupled with at least one transmit data line, the transmit buffer adapted to receive data from a host computer and temporarily store the data before transmitting the data over the transmit data line to a physical link of a data network;
• a receive buffer coupled with at least one receive data line, the receive buffer adapted to receive data from a physical link of a data network over the receive data line and temporarily store the data before providing the data to a computer;
• and
• an array of communication registers, the array including a data register coupled with the receive buffer, wherein repeated reads from the data register causes data to be read from the receive buffer,
• the array further including a status register for storing data identifying a collision of data on a physical link of the data network, the status register readable from the host computer, the status register also including at least one bit signifying an interrupt state in at least one of a read and write operation.

A system, comprising

• a media access controller including a plurality of communication registers, the communication registers having
• a data register coupled with the receive buffer, wherein repeated reads from the data register reads data received from the data network,
• a status register including at least one interrupt bit, the interrupt bit set to indicate the presence of data received from the data network and destined for the host computer, the interrupt bit readable by the host computer,
• a media independent interface register storing at least one signal for controlling operation of PHY circuitry coupled to the media access controller, wherein signals from the host computer are passed from the media independent interface register to control PHY circuitry as data are read from the data network, and
• a byte-count register storing a value indicative of the number of bytes stored in the media access controller for transfer to the host computer, the byte-count register decremented as data are read from the media access controller.

An apparatus, comprising:

• a network;
• a client computer coupled with the network;
• a network interface adapter for coupling the client computer with the network, the network interface adapter having
• a reduced hardware media access controller (MAC) coupled with the network via a physical interface, the MAC having a memory for buffering communications between the physical interface and the client computer, and
• a register interface to handle communications between the network interface adapter and the client computer, the register interface comprises a data register and a status register, the status register having at least one bit signifying an interrupt state in at least one of a read and write operation.

A system, comprising:

• a computer network;
• a client computer coupled with the computer network;
• a network interface adapter for coupling the client computer with the computer network, the network interface adapter having
• a reduced hardware media access controller (MAC) coupled with the computer network via a physical interface, the MAC having a memory for buffering communications between the physical interface and the client computer, and
• a register interface to handle communications between the network interface adapter and the client computer, the register interface comprises a data register and a status register, the status register having at least one bit signifying an interrupt state in at least one of a read and write operation.

A method, comprising:

• receiving data by a transmit buffer from a host computer and temporarily store the data before transmitting the data over a transmit data line to a physical link of a data network;
• receiving the data by a receive buffer and temporarily storing the data before providing the data to a computer;
• causing the data to be read from the receive buffer due to repeated reads from a data register coupled with the receive buffer;
• and
• storing data identifying a collision of the data on the physical link of the data network using a status register, wherein the status register having at least one bit signifying an interrupt state in at least one of a read and write operation.