Semiconductor test apparatus, and method of testing semiconductor device

A semiconductor test apparatus comprising:

• a digital-to-analog converter for producing an analog input to a circuit under test;
• a measured data memory for storing, as measured data for each conversion, a signal which has been output from the circuit under test and has been subjected to analog-to-digital conversion;
• an address counter for generating an address signal for the measured data memory;
• a DAC counter for generating data to be input to the digital-to-analog converter;
• and
• a data write control circuit for producing, in response to a flag signal which is output from the circuit under test and represents that conversion is being performed, an update signal for the address counter, a memory write signal for the measured data memory, and an update signal for the DAC counter.

A semiconductor test apparatus comprising:

• an analog-to-digital converter for converting into a digital signal an analog output from a circuit under test;
• a digital-to-analog converter for producing an analog input to be sent to the circuit under test;
• a measured data memory for storing, as measured data for each conversion, a signal output from the analog-to-digital converter and a signal which has been output from the circuit under test and has been subjected to analog-to-digital conversion;
• an address counter for generating an address signal for the measured data memory;
• a DAC counter for producing data to be input to the circuit under test and to the digital-to-analog converter;
• a data write control circuit for producing, in response to a flag signal which has been output from the analog-to-digital converter and from the circuit under test and which represents that conversion is being performed, an update signal for the address counter, a memory write signal for the measured data memory, and an update signal for the DAC counter;
• and
• a digital signal processor analysis section for reading measured data from the measured data memory and computing a characteristic parameter pertaining to the circuit under test, thus evaluating predetermined specifications.