Correlator and delay lock loop circuit
AssigneeFujitsu Limited
InventorsYasuyuki Oishi, Kazuo Nagatani, Hajime Hamada, Yoshihiko Asano
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AssigneeFujitsu Limited
InventorsYasuyuki Oishi, Kazuo Nagatani, Hajime Hamada, Yoshihiko Asano
Estimating the term…
The present invention reduces the scale of circuitry and shortens the code phase detection time needed to achieve initial synchronization. In a correlator for calculating correlation between a received spreading code contained in a received spread-spectrum signal and a reference spreading code, a combined code generator is included. The combined code generator outputs a combined spreading code by weighting and combining a plurality of phase-shifted reference spreading codes A1-AM. Further, an arithmetic circuit calculates correlation between the received spreading code and the plurality of phase-shifted reference spreading codes simultaneously. A phase detection circuit detects the phase difference between the received spreading code and a reference spreading code, namely the phase of the received spreading code from the results of the arithmetic operation.
A correlator for determining a phase difference between a received spreading code included in a spread spectrum signal and a reference code, comprising:
A correlator for determining a phase difference between a received spreading code included in a spread-spectrum signal and a reference spread code comprising:
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