Semiconductor device having test and read modes and protection such that ROM data reading is prevented in the test mode
AssigneeFujitsu Limited
InventorHiroaki Okamoto
Life of this patent
Estimating the term…
Abstract
A semiconductor device having a test mode and a read mode is provided. This semiconductor device includes a ROM and a control circuit. When a predetermined condition is satisfied, the control circuit prevents data stored in the ROM from being outputted to the outside of the semiconductor device in the test mode.
Claims19
A semiconductor device having a test mode and a read mode, said semiconductor device comprising:
- a ROM;
- a control circuit which outputs data stored in the ROM to an outside of the semiconductor device in the test mode only when a predetermined condition is satisfied;
- and
- a read control circuit which controls a read operation of the ROM,
- wherein said control circuit comprises a circuit which enables the read control circuit in the test mode only when the predetermined condition is satisfied.
A semiconductor device having a test mode and a read mode, said semiconductor device comprising:
- a ROM;
- a control circuit which outputs data stored in the ROM to an outside of the semiconductor device in the test mode only when a predetermined condition is satisfied;
- and
- a register which stores data which controls a read operation of the ROM,
- wherein said control circuit comprises a circuit which enables a read control circuit in the test mode only when the data stored in the register indicates the predetermined condition.
A semiconductor device comprising:
- a mode switch circuit which selects between a test mode and a ROM mode in accordance with external mode select signals;
- a ROM read control circuit which outputs a first signal to enable ROM data reading;
- and
- a register which outputs a second signal to the ROM read control circuit in the test mode when predetermined data is inputted to the semiconductor device so that the ROM read control circuit outputs the first signal.
A semiconductor device having a test mode and a read mode, said semiconductor device comprising:
- a ROM;
- a control circuit which outputs data stored in the ROM to an outside of the semiconductor device in the test mode only when a predetermined condition is satisfied;
- and
- a ROM read control circuit which outputs a first signal which enables reading of data from the ROM when predetermined data is inputted to the semiconductor device in the test mode.
A semiconductor device having first mode and a second mode which is different from the first mode, comprising:
- a ROM;
- a control circuit which outputs data stored in the ROM outside the semiconductor device in the first mode only when a predetermined condition is satisfied;
- and
- a ROM read control circuit which outputs a first signal which enables reading of data from the ROM when the predetermined data is inputted to the semiconductor device in the first mode.
A semiconductor device having a test mode and a read mode, comprising:
- a ROM;
- and
- a ROM read control circuit outputting a signal which disables reading of data from the ROM in the test mode, and outputting a signal which enables reading of data from the ROM when a predetermined condition is satisfied in the test mode.
Dependencies are inferred from the claim text.