Data input/output method
AssigneeInternational Business Machines Corporation
InventorsToshio Sunaga, Shinpei Watanabe
Life of this patent
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Abstract
The present invention discloses a method for data input/output for memory which minimizes losses of data interruption when switching between reading and writing. A method for data input/output comprises the steps of: holding predetermined data from memory array 12 upon m-th (m is integer) read command; outputting the predetermined data to common I/O 30 and holding new data from memory array 12 upon (m+1)-th read command; holding predetermined data from common I/O 30 upon n-th (n is integer) write command; and storing the predetermined data in memory array 12 and holding new data from common I/O 30 upon (n+1)-th write command.
Claims12
A method for data input/output for a memory, the method comprising the steps of:
- providing an output which reads data;
- holding first data from a memory array upon a first read command;
- and
- outputting said first data to said output and holding second data from the memory array upon a second read command, wherein said second read command is subsequent to said first read command.
A method for data input/output for a memory, the method comprising the steps of:
- providing an input which writes data;
- holding first data from said input upon a first write command;
- and
- storing said first data in a memory array and holding second data from said input upon a second write command, wherein said second write command is subsequent to said first write command.
A memory comprising:
- a prefetch/latch circuit which holds data from memory array;
- and,
- a preload/latch circuit which holds data from an output, wherein said prefetch/latch circuit holds first data from the memory array upon a first read command, outputs said first data to said output upon a second read command, and holds second data from the memory array upon said second read command, further wherein said second read command is subsequent to said first read command.
A memory comprising:
- a prefetch/latch circuit which holds data from a memory array;
- and,
- a preload/latch circuit which holds data from an input, wherein said preload/latch circuit holds first data from said input upon a first write command, stores said first data in the memory array upon a second write command, and holds second data from said input upon said second write command.
Dependencies are inferred from the claim text.