Intermediate voltage control circuit having reduced power consumption
AssigneeNEC Electronics Corporation
InventorHiroki Kawabata
Life of this patent
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Abstract
An intermediate voltage control circuit maintains the signal line at a stable intermediate potential. The circuit comprises a first n-channel transistor; a second p-channel transistor; a monitoring circuit for determining a potential level of a signal line connected to the output node; and a control circuit for sending first and second control signals to a gate of each of the first and second transistors so as to prevent a feedthrough current from flowing in the transistor.
Claims11
An intermediate voltage control circuit comprising:
- a first transistor having a first channel type and connected between a power node and an output node, said output node connected to a signal line, said power node supplied with power supply voltage that is higher than ground;
- a second transistor having a second channel type and connected between said output node and ground;
- a monitoring circuit connected to said output node, and outputting a determination signal in response to a voltage level of said signal line;
- and
- a control circuit having an external input node supplied with an enable signal, connected to said monitoring circuit, and controlling each of said first and second transistors,
- wherein said control circuit turns on one of said first and second transistors and turns off the other of said first and second transistors in response to said determination signal when said enable signal is activated, and said control circuit turns off both of said first and second transistors while said enable signal is inactivated, and
- wherein said first channel type transistor is an N-channel transistor and said second channel type transistor is a P-channel transistor.
An intermediate voltage control circuit comprising:
- a first transistor connected between a power node and an output node, said output node connected to a signal line, said power node supplied with power supply voltage, said first transistor being an N-channel transistor;
- a second transistor connected between said output node and ground, said second transistor being a P-channel transistor;
- a monitoring circuit having a first inverter connected between said output node and a first node;
- and
- a control circuit comprising and AND circuit having inputs connected to an external input node supplied with an enable signal and said first node of said monitoring circuit and providing a first control signal for a gate of said first transistor, and an OR circuit having inputs connected to said external input node through a second inverter and said first node and providing a second control signal for a gate of said second transistor.
An intermediate voltage control circuit comprising:
- a first transistor connected between a power node and an output node, said output node connected to a signal line, said power node supplied with power supply voltage, said first transistor being an N-channel transistor;
- a second transistor connected between said output node and ground, said second transistor being a P-channel transistor;
- a monitoring circuit having a first inverter connected between said output node and a first node;
- and
- a control circuit having a transfer gate connected between said first node and a second node, a latch circuit connected between said second node and a third node, a NOR circuit connected to said third node and an external input node through a second inverter and providing a first control signal for a gate of said first transistor, and a NAND circuit having inputs connected to said third node and said external input node and providing a second control signal for a gate of said second transistor.
Dependencies are inferred from the claim text.